Commit Graph

680 Commits

Author SHA1 Message Date
Jędrzej Boczar 7e0515c477 test: fix problem with helper scripts being executed by `setup.py test` 2020-02-04 16:37:26 +01:00
Jędrzej Boczar fcd3d4ff6c test: helper scripts for generating benchmark configurations/access patterns 2020-02-04 16:26:57 +01:00
Jędrzej Boczar fcbcd4d3fe test: add option to benchmark predefined access patterns 2020-02-04 16:26:57 +01:00
enjoy-digital 4a3ad56146
Merge pull request #129 from antmicro/8-16-bit-init
phy/model: add support for 8/16-bit wide SDR memory init
2020-02-04 11:29:28 +01:00
Piotr Binkowski 6fd8f2172f phy/model: add support for 8/16-bit wide SDR memory init 2020-02-04 10:51:56 +01:00
Florent Kermarrec 586980a4e5 frontend/dma: test and fix add_csr on DMAs 2020-02-03 19:47:49 +01:00
enjoy-digital c536330e36
Merge pull request #127 from antmicro/jboc/benchmark
Add Write/Read latency measurement
2020-02-03 19:04:48 +01:00
Jędrzej Boczar bae046f143 test: add read/write latency benchmarks 2020-02-03 16:59:12 +01:00
enjoy-digital 9aa421e52a
Merge pull request #125 from antmicro/fix-init
phy/model: fix case when not converting init data width
2020-02-03 15:09:49 +01:00
Piotr Binkowski 4c86235048 phy/model: fix case when not converting init data width 2020-02-03 13:35:49 +01:00
enjoy-digital a903c87872
Merge pull request #124 from antmicro/l2-reverse
phy/model: cleanup the memory init code
2020-02-03 12:55:02 +01:00
Jędrzej Boczar a584923f1c test: use JSON instead of pickle for storing benchmarks cache 2020-02-03 12:17:41 +01:00
Piotr Binkowski 99227ad0d0 phy/model: cleanup the memory init code
After adding support for l2_reverse flag in Cache/SoCSDRAM we can remove
code responsible for word order reversing and do a general cleanup
2020-02-03 12:02:49 +01:00
Florent Kermarrec 736723cc98 test/run_benchmarks: change YAML config file argument 2020-02-03 10:38:10 +01:00
Florent Kermarrec 7e95ecc9a9 test/run_benchmark: avoid Python 3.7+ dependency 2020-02-03 10:37:10 +01:00
enjoy-digital d8f3feb971
Merge pull request #123 from antmicro/jboc/benchmark
Add plotting of benchmark results
2020-02-03 10:35:09 +01:00
Jędrzej Boczar 811c73254b test: benchmark script exits with error on any checker error 2020-01-31 15:16:37 +01:00
Jędrzej Boczar 1a517a308d test: cache benchmark results to be able to produce multiple summaries 2020-01-31 14:39:41 +01:00
Jędrzej Boczar a40817f3a8 test: add plotting of benchmark results 2020-01-31 14:39:41 +01:00
enjoy-digital 5a90a8b0dd
Merge pull request #117 from antmicro/init-fixes
phy/model: init fixes
2020-01-31 12:46:43 +01:00
Piotr Binkowski 8fa7a93e5c phy/model: add support for sdram init for other memory types/widths
Up until now init worked correctly only on 32-bit SDR modules,
with this it should work at least with 64-bit wide DDR3, 128-bit DDR2
and 512-bit SDRAM
2020-01-31 11:14:32 +01:00
enjoy-digital eacfbd8055
Merge pull request #122 from antmicro/jboc/benchmark
Load benchmark configuration from YAML
2020-01-30 16:08:30 +01:00
Jędrzej Boczar f6973aa9d7 test: load benchmark configurations from YAML file 2020-01-30 15:39:29 +01:00
Florent Kermarrec 090620c9d6 frontend/dma: add optional CSR control 2020-01-30 15:21:37 +01:00
Jędrzej Boczar 096de78c63 test: fix `setup.py test` failing due to import error
because of relative import the script has to be run as:
    python -m test.run_benchmarks
2020-01-30 14:11:52 +01:00
enjoy-digital e17e6e34d8
Merge pull request #118 from antmicro/jboc/benchmark
Add a script for running LiteDRAM benchmarks
2020-01-30 13:31:11 +01:00
Jędrzej Boczar bb4f6106ee test: print benchmarks summary 2020-01-30 10:50:08 +01:00
Jędrzej Boczar e822e6be9f test: calculate benchmark bandwidth and efficiency 2020-01-30 10:19:17 +01:00
Jędrzej Boczar 804a9b3727 test: add script for running multiple benchmarks and parsing results 2020-01-29 17:03:20 +01:00
enjoy-digital a35a1f7790
Merge pull request #116 from antmicro/jboc/benchmark
test: add command line arguments for BIST base/length/random
2020-01-28 15:42:27 +01:00
Jędrzej Boczar 502e6c663c test: add command line arguments for BIST base/length/random 2020-01-28 15:03:36 +01:00
enjoy-digital 72e65e697f
Merge pull request #115 from antmicro/ddr4-model
phy/model: add burst_length value for ddr4 memories
2020-01-28 14:48:00 +01:00
Piotr Binkowski cd25106fc1 phy/model: add burst_length value for ddr4 memories 2020-01-28 14:23:35 +01:00
enjoy-digital 6b91c1fa86
Merge pull request #111 from antmicro/write-latency
phy/model: simulate write latency
2020-01-28 14:05:16 +01:00
Piotr Binkowski f9d00f137b phy/model: simulate write latency 2020-01-28 12:38:17 +01:00
Florent Kermarrec 586eb39b1d test: add initial benchmark test 2020-01-28 12:07:22 +01:00
Florent Kermarrec e4f901f070 phy/model: review/simplify initialization 2020-01-27 21:29:08 +01:00
enjoy-digital 9c00255483
Merge pull request #104 from antmicro/phy-model-init
phy/model: add support for initializing memory from file
2020-01-27 20:54:51 +01:00
Florent Kermarrec e5e4f528d4 examples/versa_ecp5.yml: enable CPU (required for DDR3 calibration), update copyright 2020-01-27 18:30:24 +01:00
Florent Kermarrec bb683a69ea litedram_gen: cleanup/rename CRGs, update copyrights 2020-01-27 18:29:52 +01:00
Florent Kermarrec 4d19620a37 litedram_gen: cleanup SDRAM PHY selection, remove plarform configuration parameter (can be deduced from PHY) 2020-01-27 18:20:16 +01:00
enjoy-digital b1f087959b
Merge pull request #105 from ximinity/gen_ecp5
WIP: litedram_gen: add ecp5 support
2020-01-27 17:50:47 +01:00
Piotr Binkowski a3fc1b9219 phy/model: add support for initializing memory from file 2020-01-27 15:41:08 +01:00
Florent Kermarrec 74f72f91a0 phy/usddrphy: reorder primitives parameters/signals 2020-01-26 21:14:20 +01:00
Florent Kermarrec 11293dcccc phy/s7ddrphy: reorder primitives parameters/signals 2020-01-26 21:00:57 +01:00
Florent Kermarrec f252e8b27f phy/usddrphy: simplify dqs_serdes_pattern 2020-01-26 12:55:14 +01:00
Florent Kermarrec 72da321fa4 phy/usddrphy: cleanup primitives instances 2020-01-26 12:44:48 +01:00
Florent Kermarrec 33c5d7b87e phy/s7ddrphy: simplify dqs_serdes_pattern 2020-01-26 12:04:55 +01:00
Florent Kermarrec 2072ce77b0 phy/s7ddrphy: cleanup primitives instances 2020-01-26 12:00:14 +01:00
Stefan Schrijvers 340a796129
litedram_gen: add ecp5 support 2020-01-25 18:59:26 +01:00