Commit Graph

16 Commits

Author SHA1 Message Date
Florent Kermarrec ac825e5112 add SPDX License identifier to header and specify file is part of LiteDRAM. 2020-08-23 15:52:08 +02:00
Florent Kermarrec 378c4419c1 frontend/bist: rename run/ready to run_cascade_in/run_cascade_out. 2020-04-14 16:52:02 +02:00
Florent Kermarrec b399ae2e36 test/benchmark: default value of run is 1, no need to drive it. 2020-04-14 13:00:39 +02:00
Florent Kermarrec 72d2bbf09d test/benchmarck: cleanup. 2020-03-26 10:46:11 +01:00
Jędrzej Boczar 92daf53ea2 test: fix with_uart parameter (see litex/b29f443f) 2020-03-12 14:16:21 +01:00
enjoy-digital 5fb2b011d8
Merge pull request #146 from antmicro/jboc/benchmark
Benchmarks: Generate HTML summary and deploy it from Travis
2020-02-18 13:26:20 +01:00
Piotr Binkowski f0be039a34 test: add option to use sdram timing verifier in benchmarks 2020-02-17 14:35:15 +01:00
Jędrzej Boczar b7ed91d9f0 test: suppress info log messages in benchmark runner 2020-02-17 13:14:52 +01:00
Jędrzej Boczar edf4ddb2f2 test: add option to use multiple BIST generators/checkers 2020-02-12 14:40:33 +01:00
Jędrzej Boczar 409b9922ea test: add random address generation in benchmarks 2020-02-11 13:11:06 +01:00
Jędrzej Boczar ff435fd26e test: add option to run benchmarks with alternating write/read 2020-02-11 12:06:45 +01:00
Jędrzej Boczar f9f86d507f test: update benchmark configuration to account for access pattern 2020-02-05 12:54:33 +01:00
Jędrzej Boczar fcbcd4d3fe test: add option to benchmark predefined access patterns 2020-02-04 16:26:57 +01:00
Jędrzej Boczar bae046f143 test: add read/write latency benchmarks 2020-02-03 16:59:12 +01:00
Jędrzej Boczar 502e6c663c test: add command line arguments for BIST base/length/random 2020-01-28 15:03:36 +01:00
Florent Kermarrec 586eb39b1d test: add initial benchmark test 2020-01-28 12:07:22 +01:00