Commit Graph

26 Commits

Author SHA1 Message Date
Florent Kermarrec 680806997d liteeth_gen/udp: Directly integrate UDPStreamer to simplify use and just expose a LiteX-Stream/AXI-ST interface. 2022-01-26 11:18:48 +01:00
Florent Kermarrec f264c9d5d5 liteeth_gen: Add toolchain support/parameter.
LiteX code specialization/generation can be different between toolchain (For the same vendor).
Add parameter to configure it from the .yml file.
2022-01-26 09:57:43 +01:00
Florent Kermarrec 53057121e7 examples: remove old examples and update README (new benches/examples will be added). 2020-11-23 12:54:09 +01:00
Konrad Beckmann 054eebc25f test_etherbone: Fix import of etherbone module 2020-09-30 21:04:11 +02:00
Florent Kermarrec 64b85e621e add SPDX License identifier to header and specify file is part or LiteEth.
Artix7/Ultrascale 1000BaseX is reused from MiSoC/LiteEthMini, specify it.
2020-08-23 16:07:12 +02:00
Florent Kermarrec 1d76d02ea6 frontend: rename tty to stream (tty was too specific since modules can be used for any kind of data stream). 2020-07-13 10:08:50 +02:00
Florent Kermarrec 8e1185711b common: remove Port.connect and use 2 separate Record.connect. 2020-06-22 14:36:44 +02:00
Florent Kermarrec 92c30489ae examples: use CRG from litex.build. 2020-04-10 10:31:14 +02:00
Florent Kermarrec 400ca97f45 examples: increase clk_freq to 125MHz on udp_s7phyrgmii.yml. 2020-03-19 22:01:33 +01:00
Xiretza 2e9121d330
Allow changing all SoC options through YAML config 2020-03-17 18:52:44 +01:00
Xiretza 7a44209f77
Make memory/CSR regions customizable in config
Also remove interrupt mapping, since it's unused without a CPU anyway.
2020-02-12 15:55:04 +01:00
Xiretza ca9cbd1555
Move more options to config file 2020-02-12 15:55:04 +01:00
Florent Kermarrec 358bc23cd4 examples/.ymls: add separators 2020-02-12 11:23:33 +01:00
Florent Kermarrec fcadd60cea liteeth/gen: initial switch to YAML config file (similar to LiteDRAM/LitePCIe) 2020-02-12 00:18:22 +01:00
Florent Kermarrec ddd0431373 examples: use integrated sram instead of external one. (Also fix regression with new SoC that no longer support address decoders passed to add_wb_slave) 2020-02-11 21:22:13 +01:00
Florent Kermarrec bb01840b12 add initial LiteEth standalone core generator from examples/core.py 2019-11-24 11:22:51 +01:00
Florent Kermarrec c1783ce554 examples/targets: update and cleanup 2019-11-23 19:49:23 +01:00
Florent Kermarrec d3b2f3d361 examples/targets: udpate analyzer 2019-11-23 15:47:42 +01:00
Florent Kermarrec dc8ddf6895 examples: keep up to date with LiteX 2019-11-23 15:23:24 +01:00
Florent Kermarrec e980b603cc example/udp_loopback: simplify/cleanup and make it more generic 2019-11-20 08:53:16 +01:00
Yehowshua Immanuel 50cc7d0671 examples: add practical UDP loopback example with Versa ECP5 2019-11-20 08:18:50 +01:00
Florent Kermarrec 4bc79cefd8 examples/targets/core: update 2019-09-24 12:53:06 +02:00
Florent Kermarrec ad187d35f2 add CONTRIBUTORS file and add copyright header to all files 2019-06-24 11:43:10 +02:00
Florent Kermarrec fd6d6c30ba mac: update imports 2019-06-24 11:23:13 +02:00
Florent Kermarrec 40b99ecc05 test: use new RemoteClient import 2018-09-23 10:28:50 +02:00
Florent Kermarrec 94af3d63d9 README: update and rename example_designs to examples 2018-08-31 08:26:37 +02:00