Commit Graph

13 Commits

Author SHA1 Message Date
Florent Kermarrec b394f2f45e test/mac_wishbone_tb: fix simulation 2016-03-25 12:26:02 +01:00
Florent Kermarrec 87924c84e6 test: finish mac_wishbone_tb (simulator limitation removed) 2016-03-23 09:47:47 +01:00
Florent Kermarrec 7ea1b5a22d test: use passive generators and some cleanup 2016-03-23 01:42:35 +01:00
Florent Kermarrec e73f35c733 test: remove __init__.py and use setup.py develop 2016-03-22 10:34:28 +01:00
Florent Kermarrec 2f15f3748e test: use new simulator (still etherbone_tb and mac_wishbone_tb not working due to use of FullMemoryWE) 2016-03-21 19:59:29 +01:00
Florent Kermarrec e7caf8acfb use stream_packet and stream_sim from litex 2015-11-14 00:42:33 +01:00
Florent Kermarrec d84d610104 simulations working with litex and vpi 2015-11-13 15:11:57 +01:00
Florent Kermarrec 7b9dc92b0b for now use our fork of migen 2015-11-13 14:48:53 +01:00
Florent Kermarrec 886108eee9 test: for now revert all simulation (we'll switch when missing feature of new simulator will be implemted) 2015-11-13 14:47:57 +01:00
Florent Kermarrec 57b70c640c start adapting simulations to new migen (still some issues with Migen simulator)
Simulator issues:
- MultiReg not simulated correctly (I've used direct instantiation of MultiRegImpl to get simulation working)
- MemoryArray with granularity != 1 raise NotImplementedError
2015-11-13 13:46:05 +01:00
Florent Kermarrec d786380cd2 fix simulations (adapt to new organization) and and all target in Makefile to for regression testing 2015-09-12 20:53:14 +02:00
Florent Kermarrec 306162096b fix imports 2015-09-08 09:55:43 +02:00
Florent Kermarrec 20fc519410 init repo 2015-09-07 13:29:34 +02:00