Florent Kermarrec
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65b7f08cbc
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core: add full flag for trigger memory
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2018-05-28 19:41:44 +02:00 |
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Florent Kermarrec
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c0bab06765
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core: add sequential-triggering and simplify control
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2018-05-28 19:16:53 +02:00 |
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Florent Kermarrec
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26a8b8989b
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example_designs: update
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2018-05-28 18:05:31 +02:00 |
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Florent Kermarrec
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8d4c1ddcf9
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core: simplify and run storage in "scope" clock domain to get rid of cd_ratio.
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2018-05-28 18:05:05 +02:00 |
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Florent Kermarrec
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9d5e605df3
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replace litex.gen imports with migen imports
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2018-02-23 13:43:47 +01:00 |
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Florent Kermarrec
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302a484697
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bump to 0.2.dev
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2018-02-23 13:43:28 +01:00 |
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Florent Kermarrec
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62c4bdd102
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uniformize litex cores
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2018-02-22 10:18:17 +01:00 |
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Florent Kermarrec
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985585f0b9
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__init__: add LiteScopeIODriver and LiteScopeAnalyzerDriver imports
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2018-02-19 14:50:03 +01:00 |
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Florent Kermarrec
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aa44da35c6
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example_designs/make.py: fix typos
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2018-01-20 21:22:28 +01:00 |
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Florent Kermarrec
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72e71e7200
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core: simplify
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2018-01-20 12:43:16 +01:00 |
Tim Ansell
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7803591050
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Merge pull request #9 from felixheld/indentation-fixes
Fix all remaining indentation issues in python code
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2018-01-13 13:33:11 +11:00 |
Felix Held
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febb358d33
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Fix all remaining indentation issues in python code
I ran a script that shouldn't have missed any tab in the python source files.
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2018-01-13 13:24:29 +11:00 |
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Florent Kermarrec
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7757727f5b
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implement memory flush in hardware instead of software
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2017-11-17 15:11:03 +01:00 |
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Florent Kermarrec
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c6c0812e62
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doc: add simple architecture diagram
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2017-11-13 20:39:14 +01:00 |
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Florent Kermarrec
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d5887a3eb0
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example_designs: keep up to date with litex
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2017-09-25 12:54:25 +02:00 |
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Florent Kermarrec
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d4d63d7474
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software/driver/analyzer: fix groups build
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2017-07-24 22:57:19 +02:00 |
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Florent Kermarrec
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8d87992b95
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litescope/software/dump/sigrok: remove 8 bits limitation and some cleanup
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2017-06-23 11:40:44 +02:00 |
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Florent Kermarrec
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d8649fca5f
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software/dump/sigrok: add limitation to 8 bits, will be fixed later
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2017-06-23 10:50:08 +02:00 |
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Florent Kermarrec
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2048acf80e
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software/dump/sigrok: fix write_data, now working :)
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2017-06-23 08:57:10 +02:00 |
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Florent Kermarrec
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3d35e72a48
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software/driver/analyzer: fix wait_done
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2017-06-22 19:24:08 +02:00 |
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Florent Kermarrec
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dff7ac8d4e
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software/dump/sigrok: rename capture file to dump
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2017-06-22 19:20:34 +02:00 |
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Florent Kermarrec
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b57a5f9369
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example_design: demonstrate how to use groups, create separate capture for vcd (bus support) and sigrok (no bus support)
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2017-06-22 19:12:33 +02:00 |
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Florent Kermarrec
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92710208de
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software/driver/analyzer: add wait_done method
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2017-06-22 19:11:11 +02:00 |
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Florent Kermarrec
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0c4d0f4505
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software/dump/sigrok: fix samplerate generation (2x since we are doubling data to show capture clk)
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2017-06-22 18:45:15 +02:00 |
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Florent Kermarrec
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f8ea15363c
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software/dump/common: rename clk to capture_clk in dumps
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2017-06-22 18:41:08 +02:00 |
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Florent Kermarrec
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49c524d866
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software/driver: remove samplerate handling and simply pass it when writing dump if wanted
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2017-06-22 18:37:54 +02:00 |
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Florent Kermarrec
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9e669dce7f
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software/driver/analyzer: add upload progress bar and improve presentation
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2017-06-22 18:19:44 +02:00 |
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Florent Kermarrec
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1f33e44ad5
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software/driver/io: cleanup
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2017-06-22 18:13:07 +02:00 |
|
Florent Kermarrec
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01eabb2d0d
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example_design: update with litex and fix
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2017-06-22 17:58:19 +02:00 |
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Florent Kermarrec
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e2cb7bd829
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README: consistency between projects
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2017-06-22 17:00:16 +02:00 |
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Florent Kermarrec
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cf7ea12ec8
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litescope: add support for groups of signals and dynamic muxing between them
allow multiple debug configuration in a single bitstream
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2017-06-09 12:14:00 +02:00 |
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Florent Kermarrec
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2f625c58b2
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update litex uart
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2017-04-19 10:46:17 +02:00 |
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Florent Kermarrec
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f2d63aa1f3
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test/test_analyzer: add TODO
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2017-01-19 05:30:40 +01:00 |
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Florent Kermarrec
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a80d890fb9
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test/test_dump: cleanup
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2017-01-19 05:30:25 +01:00 |
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Florent Kermarrec
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687d09f331
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README: update
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2017-01-19 04:58:40 +01:00 |
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Florent Kermarrec
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795d70011b
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test: use csr write/read functions and switch to python unittest
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2017-01-19 04:58:04 +01:00 |
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Florent Kermarrec
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238e5ffcc2
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setup.py: +x and add testsuite
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2017-01-19 04:43:40 +01:00 |
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enjoy-digital
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e3e7ae0a79
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Merge pull request #1 from mithro/records
Support Record objects.
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2016-12-14 17:38:38 +01:00 |
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enjoy-digital
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5ecb07ead3
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Merge pull request #2 from mithro/gitignore
Adding a .gitignore
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2016-12-14 17:38:12 +01:00 |
Tim 'mithro' Ansell
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8b706ce05d
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Merge remote-tracking branch 'python-ignore/master' into gitignore
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2016-12-14 17:15:29 +01:00 |
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Tim Ansell
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13dad5a522
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GitHub's default .gitignore for Python.
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2016-12-14 17:11:37 +01:00 |
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Tim 'mithro' Ansell
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9f829fe608
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Support Record objects.
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2016-12-14 16:57:32 +01:00 |
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Florent Kermarrec
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edbcf65f6f
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software: some clean up and generate clk in dump
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2016-06-13 17:07:56 +02:00 |
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Florent Kermarrec
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b989ad6ce2
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setup.py: fix version (0.1)
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2016-04-29 14:41:47 +02:00 |
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Florent Kermarrec
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2877ead735
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core: remove rounding to next ceil_pow2 (not useful)
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2016-04-25 19:16:14 +02:00 |
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Florent Kermarrec
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9eb97d7879
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core/FrontendTrigger: remove (and wrong) dw computation
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2016-04-25 15:51:48 +02:00 |
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Florent Kermarrec
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b74bcb2fbf
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use new Record.connect omit parameter (replace leave_out)
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2016-04-21 08:06:24 +02:00 |
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Florent Kermarrec
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f8e3e63ef3
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fix cd_ratio support
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2016-04-03 22:58:12 +02:00 |
|
Florent Kermarrec
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0c41c6a204
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core: minor fixes
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2016-04-03 18:26:50 +02:00 |
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Florent Kermarrec
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0f7f384ac9
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test: +x on scripts
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2016-04-03 17:30:58 +02:00 |