16b9677acd
targets: Switch to soc_core_argdict.
...
The next move was to remove soc_core and only keep soc; so this is probably the right time to do
it in targets to avoid having to handle it later.
2022-11-07 08:43:26 +01:00
33b0400aed
targets: Update LiteXArgumentParser imports.
2022-11-06 21:39:52 +01:00
9960f38d95
targets: replace LiteXSoCArgumentParser by LiteXArgumentParser, remove tasks done LiteXArgumentParser
2022-11-06 11:27:47 +01:00
548a028730
targets: Switch to LiteXModule to simplify/cleanup code.
2022-10-27 21:21:37 +02:00
45494f60e0
targets: Change SoC/Software headers generation behaviour (Now only generated with --build).
...
Re-generating the SoC/Software headers was causing some un-expected behaviours for users not familiar
with the flow. For example doing a --load with a different configuration, was re-generating the Software
headers and messing up things when trying to run software on the SoC.
2022-05-06 15:14:32 +02:00
a611f035d6
targets: Move CRG before SoCCore init (More logical and simplify some specific reset schemes) and switch SoCCore to one line when possible.
...
Moving CRG simplify reset with NaxRiscv debug module and is in fact more logical.
Also do some minor updates/cosmetic changes while touching CRG/SoCCore.
2022-04-21 12:19:45 +02:00
9d452b0d74
targets: Create target_group for target arguments.
2022-03-21 18:37:40 +01:00
cc8da9d341
targets: Simplify imports and switch to LiteXSocArgumentParser.
...
CPU parameters are now selectively exposed to the user:
./digilent_arty.py --cpu-type=vexriscv_smp --help will show VexRiscv-SMP parameters.
./digilent_arty.py --cpu-type=naxriscv --help will show NaxRiscv parameters.
2022-03-21 16:59:40 +01:00
773444a7dd
targets: Switch to get_bios_filename/get_bitstream_filename.
2022-03-17 09:21:05 +01:00
6567af6f49
Digilent CMOD A7: add flash support.
...
Add both "--flash" and "--with-spi-flash"; tested on board.
4MB flash mapped at 0x00400000.
Signed-off-by: Tim Callahan <tcal@google.com>
2022-01-22 18:50:12 -08:00
e0c4c0fe39
Add openocd programmer for Digilent CMOD A7.
...
Signed-off-by: Tim Callahan <tcal@google.com>
2022-01-20 20:54:03 -08:00
f11106e9c5
targets/digilent_cmod_a7: Simplify/Cleanup.
2022-01-19 10:03:20 +01:00
f8e3cc5361
Merge pull request #327 from bl0x/digilent_cmod_a7
...
digilent_cmod_a7: Remove unused clocks.
2022-01-19 09:59:44 +01:00
fccb952c4b
target: Remove ident_version=True no longer required.
2022-01-18 17:13:02 +01:00
2c26f07a5a
digilent_cmod_a7: Remove unused clocks.
2022-01-17 22:49:10 +01:00
1077e23e62
digilent_cmod_a7: Also propagate here.
2022-01-16 11:58:14 +01:00
53dc00eab7
targets/parser: Rely on argparse.ArgumentDefaultsHelpFormatter to provide default in help description.
...
Also do minor adjustments while doing this.
2022-01-05 17:06:40 +01:00
55ba0591df
targets: Remove SpiFlash imports (Obsolete since integration is provided by LiteX).
2021-07-27 19:35:19 +02:00
0ca203487b
pr243: Make led_chaser optional.
2021-07-27 15:00:18 +02:00
2df3f9e664
pr243/platforms: Consistency with other platforms.
2021-07-27 14:55:19 +02:00
2418df9f2b
pr243: Add @tweakoz copyrights.
2021-07-27 12:21:23 +02:00
75cadf845f
add FPGA Boards
...
1. Digilent CMOD A7
https://reference.digilentinc.com/programmable-logic/cmod-a7/start
2. Digilent Nexys 4
https://reference.digilentinc.com/programmable-logic/nexys-4/start
3. MicroNova Mercury 2
https://www.micro-nova.com/mercury-2
2021-07-17 22:03:17 -06:00
Florent Kermarrec
Gwenhael Goavec-Merou
Tim Callahan
Bastian Löher
Michael Mayers