Florent Kermarrec
|
bd4e92ad13
|
targets: cleanup, uniformize build arguments between targets.
|
2020-11-12 11:46:00 +01:00 |
|
Florent Kermarrec
|
2b17dc1b89
|
target: add rst signal to CRG to allow full reset of the SoC on reboot command.
|
2020-11-04 11:13:42 +01:00 |
|
Florent Kermarrec
|
b9ac72cf78
|
targets: simplify clocking on iCE40/ECP5 targets (AsyncResetSynchronizer now integrated in PLL).
|
2020-09-01 13:38:32 +02:00 |
|
Florent Kermarrec
|
1781be166a
|
general: add SPDX License identifier to header and specify files are part of LiteX-Boards.
|
2020-08-23 15:00:17 +02:00 |
|
Florent Kermarrec
|
5fd3e8dbcd
|
ecpix5: add SDCard.
Validated with Linux-on-LiteX-VexRiscv.
|
2020-07-28 17:45:49 +02:00 |
|
Florent Kermarrec
|
7a48a61605
|
targets: add indentifier on all targets.
|
2020-06-30 18:11:04 +02:00 |
|
Florent Kermarrec
|
1356ebb416
|
targets/ecp5: update clocking on boards with DDR3 to use reset from ddrphy.init and use primary clock for Power on reset.
|
2020-06-29 16:42:53 +02:00 |
|
Florent Kermarrec
|
eeba64d7b2
|
targets: use soc.build_name in load/flash bitstream.
|
2020-05-21 09:12:29 +02:00 |
|
Florent Kermarrec
|
2d9543b65e
|
targets: add build/load parameters on all targets.
|
2020-05-05 15:11:47 +02:00 |
|
Florent Kermarrec
|
84468c2a63
|
targets/CRG: platforms are now automatically constraining the input clocks.
|
2020-05-05 11:51:57 +02:00 |
|
Florent Kermarrec
|
1f88a9d5ec
|
platforms: make sure clocks inputs are constraints on all platforms.
Also use new loose lookup_request to simplify constraints.
|
2020-05-05 11:45:41 +02:00 |
|
Florent Kermarrec
|
865b01ec75
|
ecpix5: add ethernet.
|
2020-04-22 20:21:59 +02:00 |
|
Florent Kermarrec
|
6fe4c4ea62
|
ecpix5: add DDR3 (working)
|
2020-04-22 17:03:22 +02:00 |
|
Florent Kermarrec
|
efb13bc118
|
add mininal ECPIX-5 board support (Clk/Rst/Leds/UART), BIOS working.
|
2020-04-22 16:31:07 +02:00 |