Commit Graph

1251 Commits

Author SHA1 Message Date
Florent Kermarrec 179e9090d1 Rename efinix_titanium_ti60_bga225_dev_kit to efinix_titanium_ti60_f225_dev_kit and also exclude it from tested platforms/targets. 2021-12-13 15:54:56 +01:00
enjoy-digital 4a9828c506
Merge pull request #305 from fjullien/efinix_titanium
efinix: add titanium Ti60 dev kit
2021-12-13 15:45:55 +01:00
enjoy-digital d97b26a522
Merge pull request #304 from trabucayre/redpitaya_fix_dac_pins
platforms/redpitaya: fix DAC pins
2021-12-13 15:40:46 +01:00
Franck Jullien e84f32b918 efinix: add titanium Ti60 dev kit 2021-12-13 09:37:14 +01:00
Gwenhael Goavec-Merou 2df10f278f platforms/redpitaya: fix DAC pins 2021-12-12 15:55:31 +01:00
Florent Kermarrec fcec2c1d35 test/test_targets: Switch test_targets to VexRiscv Minimal (Supported by all targets). 2021-12-09 16:09:38 +01:00
enjoy-digital 35e0026875
Merge pull request #303 from sergachev/master
sipeed_tang_nano_4k: add option to build with Gowin EMCU
2021-12-09 14:30:54 +01:00
enjoy-digital 6f9e61360c
Merge pull request #302 from fjullien/efinix_add_bank_voltage
efinix: add bank voltage configuration to platforms
2021-12-09 14:27:58 +01:00
Ilia Sergachev 14a8c50e97 sipeed_tang_nano_4k: connect Gowin EMCU UART, undo unnecessary changes 2021-12-09 00:17:48 +01:00
Ilia Sergachev 6274c4c425 sipeed_tang_nano_4k: connect Gowin EMCU UART 2021-12-09 00:12:31 +01:00
Ilia Sergachev 13c83ba532 sipeed_tang_nano_4k: add initial Gowin EMCU support 2021-12-08 23:50:14 +01:00
Ilia Sergachev 4287ab561e sipeed_tang_nano_4k: allow non-vexriscv CPUs 2021-12-08 23:33:49 +01:00
Franck Jullien 338abb4e0c efinix: add bank voltage configuration to platforms 2021-12-08 18:10:22 +01:00
enjoy-digital 9119250276
Merge pull request #300 from tilk/de1_soc
Better support for DE1-SoC
2021-12-08 06:18:25 +01:00
enjoy-digital 2b7587632f
Merge pull request #299 from gregdavill/butterstick-updates
Butterstick updates
2021-12-08 06:16:29 +01:00
Florent Kermarrec 8ad89881c2 fairwaves_xtrx: Add pcie_x2 definitions and switch to it. 2021-12-07 15:27:55 +01:00
Florent Kermarrec df175c5750 efinix_trion_t20_mipi_dev_kit: Add clk26. 2021-12-07 15:27:18 +01:00
Greg Davill 59d487f9fb butterstick: Add pullup on sdcard_cd 2021-12-07 14:32:13 +10:30
Marek Materzok cbeb2a3792 Add LedChaser to DE1-SoC 2021-12-05 20:16:10 +01:00
Marek Materzok 1d5bbb4c7f Fix loading bitstream for DE1-SoC 2021-12-05 20:16:10 +01:00
Marek Materzok 90c9696c73 LED, buttons, GPIOs etc. for DE1-SoC 2021-12-05 20:16:00 +01:00
Greg Davill fd2ec534a7 butterstick: Add extra pins 2021-12-05 20:33:28 +10:30
Greg Davill c8a8e943b5 butterstick: add --sdram-device option
Set 64M16 as default sdram-device.

Related to #298
2021-12-04 17:07:06 +10:30
Greg Davill 61b0dfe63c butterstick: Add additional SYZYGY connectors 2021-12-04 17:02:36 +10:30
Florent Kermarrec bf8b23c19f trenz_tec0117: Update target. 2021-12-02 18:23:11 +01:00
enjoy-digital efa1f46356
Merge pull request #297 from sergachev/master
Fix Sipeed Tang Nano 4k example compilation; adapt Gowin PLL class changes
2021-12-02 09:14:32 +01:00
Ilia Sergachev 666ef9dad3 sipeed_tang_nano_4k: use minimal vexriscv variant to fit into number of BSRAMs 2021-11-29 11:46:32 +01:00
Ilia Sergachev 2fb734a0f2 sipeed_tang_nano*: adapt Gowin PLL changes in litex 2021-11-29 11:45:13 +01:00
Florent Kermarrec b3175e4a9c fairwares_xtrx: Generate Fallback/Operational bitstreams. 2021-11-26 16:20:44 +01:00
Florent Kermarrec 1829693877 fairwaves_xtrx: Integrate ICAP/SPIFlash (for update over PCIe). 2021-11-26 16:18:52 +01:00
Florent Kermarrec 2555fdff91 fairwaves_xtrx: Add SPIFlash, I2C, GPS, I2C, AUX, RF-Switches, RF-IC IOs. 2021-11-26 16:00:07 +01:00
enjoy-digital 4a448579b3
Merge pull request #296 from mmicko/tang_primer
Initial support for Sipeed Tang Primer
2021-11-23 19:04:17 +01:00
enjoy-digital fe14e16c1b
Merge branch 'master' into tang_primer 2021-11-23 19:04:09 +01:00
enjoy-digital 9f1e8212cf
Merge pull request #295 from mmicko/fireant
FireAnt board support
2021-11-23 18:57:11 +01:00
Miodrag Milanovic 6954dd25eb Set minimal core, since full does not work for some reason 2021-11-23 15:26:54 +01:00
Miodrag Milanovic b0dcd96964 added comments 2021-11-23 14:58:08 +01:00
Miodrag Milanovic 9242115168 Exclude from test targets 2021-11-23 14:53:41 +01:00
Miodrag Milanovic b44d9efc1f Remove from test targets 2021-11-23 14:52:48 +01:00
Miodrag Milanovic 0b7fabb864 FireAnt board support 2021-11-23 14:43:52 +01:00
Miodrag Milanovic 2cc322e65d Add initial support for Tang Primer board 2021-11-22 19:10:11 +01:00
Florent Kermarrec 70c0dbb185 targets/radiona_ulx3s: Remove SDRAM underflows debug pin. 2021-11-22 11:54:18 +01:00
enjoy-digital b1817af8a8
Merge pull request #294 from antmicro/fix-ddr4-datacenter-platform
platforms: ddr4 datacenter: invert eth clocks
2021-11-21 19:11:13 +01:00
Florent Kermarrec 3e9e9bc425 platforms/sqrl_acorn: Add Multiboot Operational/Fallabck bistreams generation.
To allow recovery in case of PCIe update failure (Write error, power issue or crash).
2021-11-21 19:10:21 +01:00
Florent Kermarrec 60b769b624 efinix_trion_t120_bga576_dev_kit/ethernet: Disable software debug (RX now seems to be working fine). 2021-11-16 18:53:15 +01:00
Florent Kermarrec 996f5b2edd efinix_trion_t120_bga576_dev_kit: Enable target1 port and also connect it to SoC. 2021-11-16 18:12:42 +01:00
Florent Kermarrec 7ce6c4cf79 efinix_trion_t120_bga576_dev_kit: Switch to ctrl_type = "none" (Also seems to work fine, avoid ddr_reset_sequencer dependency). 2021-11-16 17:50:47 +01:00
Florent Kermarrec 99f4f97f00 efinix_trion_t120_bga576_dev_kit: Use new InterfaceWriterBlock/InterfaceWriterXMLBlock and move PLL/DRAM blocks definition to target. 2021-11-16 17:41:26 +01:00
Alessandro Comodi fa26b126df platforms: ddr4 datacenter: invert eth clocks
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2021-11-16 12:55:50 +01:00
enjoy-digital 45f9e25b5a
Merge pull request #293 from hansfbaier/master
Wrong pin / use default setup without CPU
2021-11-15 08:37:00 +01:00
Hans Baier e16fa193fc qmtech 10cl006: remove all options which won't fit into the device. use uartbone as default 2021-11-15 10:23:01 +07:00