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619 Commits

Author SHA1 Message Date
enjoy-digital 06396a2cb6
Merge pull request #384 from hansfbaier/qmtech-ep4cgx150 
add board support for QMTech EP4CGX150
 2022-04-21 10:36:51 +02:00
Florent Kermarrec b2a346edc8 aliexpress_u420t: Review/Simplify. 
Specific integrated ROM/SRAM/MAIN_RAM size can be passed through command line parameters.
 2022-04-21 10:32:18 +02:00
Florent Kermarrec 3e9e970076 Add aliexpress prefix to boards from aliexpress that seem to be from the same unknown vendor. 2022-04-21 10:06:11 +02:00
enjoy-digital 8c51cb12c8
Merge pull request #383 from sysmanalex/master 
Added Kintex-7 xc7k420t xc7k420tiffg901-2L named as u420t board
 2022-04-21 10:02:05 +02:00
Hans Baier b41d72e1d0 add board support for QMTech EP4CGX150 2022-04-16 06:36:24 +07:00
Florent Kermarrec 23b1b15486 Add initial/minimal Pluto SDR support. 2022-04-14 12:13:03 +02:00
Alex Petrov 1e00a43fdd board u420t kintex update v0.2 2022-04-13 00:12:59 +03:00
Alex Petrov 89570b005c Added Kintex-7 xc7k420t xc7k420tiffg901-2L named as u420t board 2022-04-12 22:38:14 +03:00
Florent Kermarrec b99d788732 fairwaves/xtrx: Update with xtrx_julia improvements. 2022-04-12 17:42:52 +02:00
Florent Kermarrec dd27a3473b platforms: Add LambdaConcept's PCIe Screamer/M2. 2022-04-01 11:41:07 +02:00
Florent Kermarrec 867489d855 xilinx_zcu106: Add PCIe Gen3 X4 support. 2022-04-01 10:01:06 +02:00
Franck Jullien 299d4d66d6 efinix: ti60f225 add MIPI RX 2022-03-29 15:29:59 +02:00
enjoy-digital 13e5062793
Merge pull request #379 from chmousset/add_t8_devkit 
[enh] added efinix t8f81 dev kit
 2022-03-28 14:58:21 +02:00
enjoy-digital e6a9f44580
Merge pull request #378 from antmicro/add-missing-peripherals 
DDR4 datacenter: add missing peripherals
 2022-03-28 14:40:22 +02:00
enjoy-digital 83d7c3fb39
Merge pull request #377 from Johnsel/arduino_mkrvidor4000 
Board support for Arduino MKR Vidor 4000
 2022-03-28 14:34:59 +02:00
Charles-Henri Mousset 7a68dcc79b [enh] added efinix t8f81 dev kit 2022-03-26 09:52:20 +01:00
Alessandro Comodi 33516a40f4 antmicro_datacenter: add missing peripherals 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2022-03-25 13:49:41 +01:00
Alessandro Comodi 77cb866233 antmicro_datacenter: add HDMI output 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2022-03-25 10:03:07 +01:00
John Simons 501c50ff79 Fixed serial port comments hinting the correct pins. 2022-03-24 08:04:47 -07:00
John Simons 901942bda6 Cleanup for pushing. This commit combined with my litedram fork produces a running basic SoC + bios --=============== SoC ==================-- 
CPU:BUS:E 32-bit @ 4GiB
CSR:16-bit @ 48MT/s (CL-2 CWL-2)

--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Switching SDRAM to hardware control.
Memtest at 0x40000000 (2.0MiB)...
  Write: 0x40000000-0x40200000 2.0MiB
   Read: 0x40000000-0x40200000 2.0MiB
Memtest OK
Memspeed at 0x40000000 (Sequential, 2.0MiB)...
  Write speed: 13.6MiB/s
   Read speed: 21.3MiB/s

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
 2022-03-24 07:39:14 -07:00
Hans Baier e445c9ec71 qmtech_5cefa2: make serial pins consistent with other boards 2022-03-24 18:52:28 +07:00
Sylvain Munaut bcedf573e0 adi_adrv2crr: Add IO definition for the AD9545 reset line 
We use PULLUP on it so that the AD9545 is by default held out
of reset without the user having to do anything ...

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2022-03-23 20:42:30 +01:00
Sylvain Munaut cdb78efd3c adi_adrv2crr: Document I2C devices attached 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2022-03-23 20:42:30 +01:00
Sylvain Munaut 6c31f16df2 adi_adrv2crr: Fix I2C signal assignement 
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2022-03-23 20:42:30 +01:00
Florent Kermarrec 73458ae9d7 decklink_quad_hdmi_recorder: Add Serial/UART pins. 2022-03-23 11:08:51 +01:00
enjoy-digital d399f33dda
Merge pull request #374 from smunaut/adrv2crr 
adi_adrv2crr: Upgrade part to speedgrade 2
 2022-03-23 09:09:57 +01:00
Sylvain Munaut dc92584681 adi_adrv2crr: Upgrade part to speedgrade 2 
Even though the schematic and bom call for speedgrade 1, this was only for
the prototypes.

All productions units have been updated to speedgrade 2.

See this thread:
https://ez.analog.com/fpga/f/q-a/112356/adrv9009-zu11eg-speed-grade

And the official HDL project for the board:
https://github.com/analogdevicesinc/hdl/blob/master/projects/adrv9009zu11eg/adrv2crr_fmc/system_project.tcl#L16

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2022-03-22 23:36:41 +01:00
Goran Mahovlic 68c23e9251
faster sdcard boot on 2.0 2022-03-22 17:54:12 +01:00
John Simons b8b0aead28 Added basic support for Arduino MKR Vidor 4000 2022-03-21 18:54:29 -07:00
Florent Kermarrec 3ebad7f7cc gsd_orangecrab/butterstick: Add assert on devices. 2022-03-18 10:44:21 +01:00
Florent Kermarrec 9faa805ab9 alinx_ax7010: Review/Cleanup. 2022-03-17 11:31:02 +01:00
enjoy-digital 3aa1042f5f
Merge pull request #367 from ggangliu/zynq_xc7z010 
Add ALINX AX7010 board support
 2022-03-17 09:52:04 +01:00
Florent Kermarrec 0f82db26da rcs_artic_term_bmc_card: Fix is -> ==. 2022-03-17 09:45:47 +01:00
Yonggang Liu 0e7145b4a1
Update and rename xilinx_alinx_ax7010.py to alinx_ax7010.py 2022-03-17 11:21:42 +08:00
Florent Kermarrec 0745162a29 xilinx_zcu102: Review/Cleanup for consistency with others boards. 
Also remove INTERNAL_VREF constraints that are not yet useful (required for DRAM).
 2022-03-16 18:47:05 +01:00
Joseph Faye f4a48e51d7
add xilinx_zcu102 platform 2022-03-16 15:37:02 +01:00
Yonggang Liu 5365c7fce4
Rename xilinx_zynq_xc7z010.py to xilinx_alinx_ax7010.py 2022-03-15 15:50:09 +08:00
Yonggang Liu 4159faf48b
Add files via upload 
Adding zynq_xc7z010 board support
 2022-03-12 12:20:54 +08:00
Robert Szczepanski 688377de7c lpddr4_test_board: Fix button pin 2022-03-11 15:59:43 +01:00
enjoy-digital 3b74673a93
Merge pull request #363 from curliph/master 
add Gowin programmer support
 2022-03-08 17:26:50 +01:00
Florent Kermarrec f52a915487 lambdaconcept_ecpix5: Add initial Video support at 640x480 (with Terminal/Framebuffer). 
I2C intialization code adapted from https://github.com/ultraembedded/ecpix-5.

Tested with:
- python3 -m litex_boards.targets.lambdaconcept_ecpix5 --cpu-type=firev --with-video-terminal --build --load
- python3 -m litex_boards.targets.lambdaconcept_ecpix5 --cpu-type=firev --with-video-framebuffer --build --load

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2022 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS built on Mar  8 2022 15:34:22
 BIOS CRC passed (c7fe9ecd)

 Migen git sha1: ac70301
 LiteX git sha1: 7ebc7625

--=============== SoC ==================--
CPU:		FireV-STANDARD @ 75MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128KiB
SRAM:		8KiB
L2:		8KiB
SDRAM:		524288KiB 16-bit @ 300MT/s (CL-6 CWL-5)

--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Read leveling:
  m0, b00: |01110000| delays: 02+-01
  m0, b01: |00000000| delays: -
  m0, b02: |00000000| delays: -
  m0, b03: |00000000| delays: -
  best: m0, b00 delays: 02+-01
  m1, b00: |01110000| delays: 02+-01
  m1, b01: |00000000| delays: -
  m1, b02: |00000000| delays: -
  m1, b03: |00000000| delays: -
  best: m1, b00 delays: 02+-01
Switching SDRAM to hardware control.
Memtest at 0x40000000 (2.0MiB)...
  Write: 0x40000000-0x40200000 2.0MiB
   Read: 0x40000000-0x40200000 2.0MiB
Memtest OK
Memspeed at 0x40000000 (Sequential, 2.0MiB)...
  Write speed: 13.6MiB/s
   Read speed: 23.4MiB/s

--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex> ident
Ident: LiteX SoC on ECPIX-5 2022-03-08 15:34:19
 2022-03-08 15:40:52 +01:00
curliph 6eb906a2ca
Update sipeed_tang_nano_9k.py 
add Gowin programmer support
 2022-03-08 14:00:53 +08:00
curliph 4c9bc53a3c add Win/powershell and WSL support 2022-03-08 13:24:56 +08:00
Florent Kermarrec cadfde4d39 litex_acorn_baseboard: Add SerDes refclk and m2_tx/rx pins. 2022-03-07 18:41:53 +01:00
enjoy-digital 50cc75fd56
Merge pull request #361 from smunaut/adrv2crr 
adi_adrv2crr: Add support for the ADI ADRV2CRR with ADRV9009-ZU11EG SoM
 2022-03-07 09:24:36 +01:00
Florent Kermarrec 37783ff9fd colorlight_5a_75e: Fix _connectors_v6_0/j16 first pin (thanks @WhichWayWazzit). 2022-03-07 09:16:07 +01:00
Sylvain Munaut ec28ca8fa3 adi_adrv2crr: Add support for the ADI ADRV2CRR with ADRV9009-ZU11EG SoM 
This is a carrier board with a SoM mounted on it.
There is also an FMC connector that can accept another
AD-FMCOMMS8-EBZ to get two more ADRV9009 RFIC but support for
that is not added yet.

Note that the PCIe support requires :
 - Change the .xci in the litepcie to use the right Quad
 - Revert litex 3c34039b731b42e27e2ee6c8e399e5eb8f3a058f so the
   timing constrainst of litepcie apply correctly

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 2022-03-03 22:17:09 +01:00
Alessandro Comodi 7933e9462e antmicro_datacenter: fix i2c pads assignment 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2022-03-01 16:35:15 +01:00
Florent Kermarrec 7a5fe4c221 efinix_titanium_ti60_f225_dev_kit: Update iobank_info with the values used in the video example design. 2022-03-01 14:01:43 +01:00
Alessandro Comodi db2d83ea29 antmicro_datacenter: use 100 MHz and add i2c master 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2022-03-01 13:00:36 +01:00