Commit Graph

47 Commits

Author SHA1 Message Date
Florent Kermarrec a0fd3e7536 Add initial OCP-TAP TimeCard support with PCIe/SPIFlash/Leds/Buttons/DNA/XADC (Compiles but untested). 2023-01-12 18:50:23 +01:00
inc f0dc9a6874 initial support for machdyne konfekt and noir 2022-12-30 17:00:35 +01:00
Florent Kermarrec f1899954e9 Add initial NewAE CW305 board support. 2022-09-13 12:38:30 +02:00
Florent Kermarrec fdd16b796f README: Update boards list. 2022-08-24 15:26:34 +02:00
AEW2015 313e758ffe Updated copywrite and renamed to avnet_aesku40 2022-06-03 20:49:52 -06:00
Florent Kermarrec 45494f60e0 targets: Change SoC/Software headers generation behaviour (Now only generated with --build).
Re-generating the SoC/Software headers was causing some un-expected behaviours for users not familiar
with the flow. For example doing a --load with a different configuration, was re-generating the Software
headers and messing up things when trying to run software on the SoC.
2022-05-06 15:14:32 +02:00
Florent Kermarrec 0ce7f8354c Add initial LimeSDR Mini V2 support (With SoC + USB3 (FT245PHYSynchronous)).
python3 -m litex_boards.targets.limesdr_mini_v2 --csr-csv=csr.csv --build --load
litex_server --jtag --jtag-config=openocd_limesdr_mini_v2.cfg
litex_term crossover

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2022 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS built on May  3 2022 18:59:46
 BIOS CRC passed (5f29afcc)

 LiteX git sha1: a4cc859d

--=============== SoC ==================--
CPU:		VexRiscv @ 80MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128KiB
SRAM:		8KiB


--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex> ident
Ident: LiteX SoC on LimeSDR-Mini-V2 2022-05-03 18:59:29
2022-05-03 19:04:06 +02:00
Florent Kermarrec 14f4500653 README: Update boards list. 2022-04-21 10:39:54 +02:00
enjoy-digital 8c51cb12c8
Merge pull request #383 from sysmanalex/master
Added Kintex-7 xc7k420t xc7k420tiffg901-2L named as u420t board
2022-04-21 10:02:05 +02:00
Florent Kermarrec 5aab6f01b6 README: Update boards list. 2022-04-14 12:30:19 +02:00
Alex Petrov 1e00a43fdd board u420t kintex update v0.2 2022-04-13 00:12:59 +03:00
John Simons b8b0aead28 Added basic support for Arduino MKR Vidor 4000 2022-03-21 18:54:29 -07:00
Florent Kermarrec e5fd58f1af README: Add adi_adrv2crr_fmc. 2022-03-07 09:26:24 +01:00
Florent Kermarrec ddd040bc42 README: Switch to python3 -m litex_boards.targets.<board> and remove .py in boards list. 2022-03-01 14:08:34 +01:00
Florent Kermarrec 89a80e713e README: Update boards picture with reduced jpg version. 2022-03-01 14:03:00 +01:00
Florent Kermarrec 1ce0a4b070 README: Update and simplify boards listing. 2022-03-01 11:57:32 +01:00
Sergiu Mosanu 5a0f69502b enable use of HBM for linux boot 2022-02-08 12:18:38 -05:00
Florent Kermarrec d9303e096b Bump year. 2022-01-05 09:09:16 +01:00
alainlou 1b676f929a cleanup and ease of use
- update README
- delete some unnecessary toolchain commands (copied from trenz boards)
- use minimal cpu_variant by default when vexriscv is selected
2021-10-03 13:21:45 -04:00
Benjamin Herrenschmidt 4a52996106 Wukong board improvements
This adds support for v2 of the board via a --board-version argument
and a way to select the FPGA speed grade via a --speed-grade argument.

Note that the speed grade now defaults to -1. QMTech confirmed that
V1 of the board were made in two batches, one with -1 and one with -2,
while V2 of the board is all -1. So -1 is the safer default.

This also fixes the inversion of j10 and j11 and a typo in the pin
definition of jp3

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2021-09-24 12:13:56 +10:00
Alain Lou 610e82d774
Add initial RZ-EasyFPGA support! (#270) 2021-09-21 09:55:22 +02:00
Kamyar Mohajerani b75af2f21c
Update README.md
FPGA on "Zybo Z7" is a 7-Series Zynq not a Zynq Ultrascale+
2021-09-15 10:21:10 -04:00
Dhiru Kholia 781d83bab6 Add support for EBAZ4205 'Development' Board
Usage:

```
./ebaz4205.py --cpu-type=vexriscv --build --load
```

```
$ pwd
litex-boards/litex_boards/targets
```

Tip: Use `GTKTerm` to connect to /dev/ttyUSB0 (usually) and interact
with the LiteX BIOS.

References:

- https://github.com/fusesoc/blinky#ebaz4205-development-board
- https://github.com/olofk/serv/#ebaz4205-development-board
- https://github.com/xjtuecho/EBAZ4205#ebaz4205
- https://github.com/nmigen/nmigen-boards/pull/180 (merged)
- https://github.com/olofk/corescore/pull/33
- The existing 'Zybo Z7' example

Note: The `PS7` stuff remains untested via LiteX for now.
2021-08-31 18:54:49 +02:00
alainlou 126c98488a update IRC channel 2021-08-16 14:18:08 -04:00
enjoy-digital 25867c4dcb
Merge pull request #218 from helium729/master
Add digilent basys3 board support
2021-05-23 19:46:58 +02:00
Jakub Cabal dd5a4bdc92 CYC1000: Add initial support of CYC1000 board 2021-05-22 21:17:27 +02:00
helium729 95b589fc22 add info to README 2021-05-17 16:49:04 +08:00
enjoy-digital 5ae130661f
Merge pull request #213 from hansfbaier/icesugar
muselab_icesugar: first basic version which boots
2021-05-07 08:50:50 +02:00
Hans Baier c2e0f6026e muselab_icesugar: first basic version that boots 2021-05-07 11:50:28 +07:00
Hans Baier eec1078736 add QMTECH XC7A35T core board + daughter board 2021-05-06 05:50:48 +07:00
Sergiu Mosanu 9e42183066 update AU280 description 2021-04-27 17:29:55 -04:00
enjoy-digital f4ea3fb0d9
Merge pull request #168 from hplp/alveo_u280
Alveo U280 board
2021-03-10 11:16:32 +01:00
Hans Baier 767e2875b3 README.md: fix typo 2021-02-26 04:55:11 +07:00
Hans Baier 6f558a5d65 Add board support for Terasic/Arrow DECA board 2021-02-25 12:25:43 +07:00
Hans Baier bc255a6a0d arrow_sockit: Add README table entry and test target 2021-02-25 12:25:43 +07:00
Sergiu Mosanu 5a1447dc5c mention HBM2 2021-01-15 17:52:17 -05:00
Sergiu Mosanu 58e25757eb list Alveo U280 2021-01-15 12:16:10 -05:00
Florent Kermarrec e1f9fd1a25 README: update and center banner. 2020-12-17 18:55:13 +01:00
Florent Kermarrec b9d9af3183 ci: switch from Travis CI to Github Actions. 2020-11-24 14:01:23 +01:00
Nathaniel R. Lewis 389b623fe2 targets/litefury: new target
LiteFury is an Artix-7 development board in the M.2 form factor
for PCIe accelerator development. It's similar to the Aller but
with an xc7a100t rather than an xc7a200t and no TPM module.

https://rhsresearch.com/collections/rhs-public/products/litefury
2020-11-19 21:52:14 -08:00
Florent Kermarrec 27f60b2e93 add initial Siglent SDS1104X-E support (Ethernet & DDR3 validated).
Pinout from https://github.com/360nosc0pe project.
2020-11-13 12:20:15 +01:00
Florent Kermarrec f0581815f5 README: fix typo. 2020-07-28 17:44:30 +02:00
Florent Kermarrec ecdc1ef7fd README: add missings . 2020-07-27 11:44:30 +02:00
Florent Kermarrec 361afa74b6 README: add links to LiteX's wiki. 2020-07-27 11:05:14 +02:00
Florent Kermarrec 02c0c0a1b1 README: add board picture and fix a few typos. 2020-07-27 08:53:12 +02:00
Florent Kermarrec bfbee484c7 Readme/boards: fill most of the missing infos. 2020-07-25 22:17:22 +02:00
Florent Kermarrec e9706d4465 README: add initial contents and list of supported boards. 2020-07-25 20:21:51 +02:00