7 commits

Author	SHA1	Message	Date
msloniewski	9c5a4f757f	targets/de10lite: add VideoSoC with VGA peripheral ... Add VideoSoC build option, based on Frank Buss example.	2019-12-30 23:25:43 +01:00
msloniewski	cace17e162	targets/de10lite: refactor setting up clock domains ... Use PLL to generate clock for both sys clock domain and clock domain for sdram. Additionally set up clock domain for VGA periph.	2019-12-30 23:25:43 +01:00
Florent Kermarrec	30ea463b41	targets: keep attributes are no longer needed since automatically added when applying constraints to signals.	2019-12-06 16:01:59 +01:00
Florent Kermarrec	f7fbfb4639	partner/community/targets: uniformize, improve presentation	2019-12-03 09:33:08 +01:00
Florent Kermarrec	ac58d57a83	targets: import platforms from litex_boards.platforms	2019-08-26 09:09:40 +02:00
Florent Kermarrec	aeddb93729	add copyright header to all files, udpate.	2019-06-24 12:13:54 +02:00
Florent Kermarrec	44d01edab9	dispatch platforms/targets by level of support	2019-06-10 18:59:49 +02:00

Renamed from litex_boards/official/targets/de10lite.py (Browse further)