John Simons
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721fa0b4b3
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axau15: added more FMC+ pins and made some corrrections
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2024-01-27 03:27:48 +01:00 |
Florent Kermarrec
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982038508e
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alinx_axau15/PCIe: Switch to Gen3/128-bit for now (configuration used on others Ultrascale+ Gen3 X4 boards).
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2023-12-28 19:56:52 +01:00 |
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Florent Kermarrec
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e229d1a0b6
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alinx_axau15: First review/cleanup pass and fix missing INTERNAL_VREF on bank 66.
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2023-12-28 19:48:50 +01:00 |
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John Simons
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2c2b3e318a
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Fixed pinout and first steps adding PCIe support
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2023-12-12 15:44:51 +01:00 |
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John Simons
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ab60d91138
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alinx_axau15: Fixed minor clock and sdcard reference issues
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2023-12-05 21:14:57 +01:00 |
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John Simons
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7be052911b
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alinx_axau15: Added new Alinx Artix US+ board
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2023-12-05 20:45:57 +01:00 |