DerFetzer 8bd736bd77 targets/colorlight_5a_75x: make Ethernet PHY selectable, cast sys_clk_freq to int for Wishbone		2020-09-02 22:08:45 +02:00
..
platforms	targets/colorlight_5a_75x: fix rx_data pin order for Ethernet PHY 0	2020-09-02 22:04:23 +02:00
prog	platforms/genesys2: add openocd specific configuration (channel 1 used for JTAG).	2020-06-23 11:55:50 +02:00
targets	targets/colorlight_5a_75x: make Ethernet PHY selectable, cast sys_clk_freq to int for Wishbone	2020-09-02 22:08:45 +02:00
tools	general: add SPDX License identifier to header and specify files are part of LiteX-Boards.	2020-08-23 15:00:17 +02:00
__init__.py	init repo with litex official boards	2019-06-10 17:11:36 +02:00