litex-boards/litex_boards/targets
Florent Kermarrec cb95962850 targets/ulx3s and colorlight_5a_75b: cleanup USB ACM addition and only keep USB ACM changes.
- remove update in loading/flashing: we need to thinks how to integrate this.
- remove specific README: documentation is moved to the files, link to more complete project can
be added if maintained externally, as done for the iCEBreaker for example.
- revert default freq on ULX3S to 50MHz and instantiate a second PLL as done on the colorlight.
2020-04-14 16:14:18 +02:00
..
__init__.py
ac701.py targets: switch to add_ethernet method instead of EthernetSoC. 2020-03-21 18:29:52 +01:00
aller.py targets: update PCIe on Numato targets. 2020-03-25 11:53:52 +01:00
arty.py targets: switch to add_etherbone method. 2020-03-21 21:40:45 +01:00
arty_s7.py arty_s7: fix copyrights, rename to arty_s7, various minor changes to make it similar to others targets. 2020-04-13 15:20:36 +02:00
c10lprefkit.py targets/c10lprefkit: use Cyclone10LPPLL, remove 50MHz limitation. 2020-04-08 08:34:59 +02:00
camlink_4k.py targets/add_constant: avoid specifying value when value is None (=default) 2020-03-26 09:47:22 +01:00
colorlight_5a_75b.py targets/ulx3s and colorlight_5a_75b: cleanup USB ACM addition and only keep USB ACM changes. 2020-04-14 16:14:18 +02:00
de0nano.py targets: use DDROutput on sdram_clock and similar configuration for all SDRAM targets. 2020-04-10 14:43:04 +02:00
de1soc.py targets: use DDROutput on sdram_clock and similar configuration for all SDRAM targets. 2020-04-10 14:43:04 +02:00
de2_115.py targets: use DDROutput on sdram_clock and similar configuration for all SDRAM targets. 2020-04-10 14:43:04 +02:00
de10lite.py targets: use DDROutput on sdram_clock and similar configuration for all SDRAM targets. 2020-04-10 14:43:04 +02:00
de10nano.py targets: use DDROutput on sdram_clock and similar configuration for all SDRAM targets. 2020-04-10 14:43:04 +02:00
ecp5_evn.py
fomu.py
genesys2.py targets: switch to add_etherbone method. 2020-03-21 21:40:45 +01:00
hadbadge.py targets: use DDROutput on sdram_clock and similar configuration for all SDRAM targets. 2020-04-10 14:43:04 +02:00
icebreaker.py
kc705.py targets: switch to add_ethernet method instead of EthernetSoC. 2020-03-21 18:29:52 +01:00
kcu105.py targets/add_constant: avoid specifying value when value is None (=default) 2020-03-26 09:47:22 +01:00
kx2.py targets: switch to SoCCore/add_sdram instead of SoCSDRAM. 2020-03-21 12:43:39 +01:00
linsn_rv901t.py targets: use DDROutput on sdram_clock and similar configuration for all SDRAM targets. 2020-04-10 14:43:04 +02:00
mercury_xu5.py targets/add_constant: avoid specifying value when value is None (=default) 2020-03-26 09:47:22 +01:00
mimas_a7.py targets: switch to add_ethernet method instead of EthernetSoC. 2020-03-21 18:29:52 +01:00
minispartan6.py targets: use DDROutput on sdram_clock and similar configuration for all SDRAM targets. 2020-04-10 14:43:04 +02:00
nereid.py targets: update PCIe on Numato targets. 2020-03-25 11:53:52 +01:00
netv2.py targets: switch to add_ethernet method instead of EthernetSoC. 2020-03-21 18:29:52 +01:00
nexys4ddr.py targets: switch to add_ethernet method instead of EthernetSoC. 2020-03-21 18:29:52 +01:00
nexys_video.py targets: switch to add_ethernet method instead of EthernetSoC. 2020-03-21 18:29:52 +01:00
orangecrab.py targets/add_constant: avoid specifying value when value is None (=default) 2020-03-26 09:47:22 +01:00
pipistrello.py targets: switch to SoCCore/add_sdram instead of SoCSDRAM. 2020-03-21 12:43:39 +01:00
simple.py targets/simple: use CRG from litex.build. 2020-04-10 10:26:19 +02:00
tagus.py targets: update PCIe on Numato targets. 2020-03-25 11:53:52 +01:00
trellisboard.py targets/add_constant: avoid specifying value when value is None (=default) 2020-03-26 09:47:22 +01:00
ulx3s.py targets/ulx3s and colorlight_5a_75b: cleanup USB ACM addition and only keep USB ACM changes. 2020-04-14 16:14:18 +02:00
vc707.py targets: switch to SoCCore/add_sdram instead of SoCSDRAM. 2020-03-21 12:43:39 +01:00
vcu118.py targets/vcu118: fix clk500 typo. 2020-04-07 13:53:22 +02:00
versa_ecp5.py targets/add_constant: avoid specifying value when value is None (=default) 2020-03-26 09:47:22 +01:00
zcu104.py zcu104: add fully working SO-DIMM config 2020-03-26 16:37:11 +01:00