litex/misoc/com/uart/bridge.py

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from migen.fhdl.std import *
2015-09-22 12:35:02 -04:00
from misoc.tools.wishbone import WishboneStreamingBridge
from misoc.com.uart.phy.serial import UARTPHYSerial
class UARTWishboneBridge(WishboneStreamingBridge):
def __init__(self, pads, clk_freq, baudrate=115200):
self.submodules.phy = UARTPHYSerial(pads, clk_freq, baudrate)
WishboneStreamingBridge.__init__(self, self.phy, clk_freq)