cores/cpu/vexriscv_smp: Remove FIXME/CHECKME now that working and remove UART_POLLING flag.
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@ -169,7 +169,6 @@ class VexRiscvSMP(CPU):
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def gcc_flags(self):
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def gcc_flags(self):
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flags = f" -march={VexRiscvSMP.get_arch()} -mabi={VexRiscvSMP.get_abi()}"
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flags = f" -march={VexRiscvSMP.get_arch()} -mabi={VexRiscvSMP.get_abi()}"
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flags += f" -D__vexriscv_smp__"
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flags += f" -D__vexriscv_smp__"
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#flags += f" -DUART_POLLING"
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return flags
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return flags
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# Reserved Interrupts.
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# Reserved Interrupts.
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@ -18,7 +18,7 @@ extern "C" {
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#define PLIC_THRSHLD 0xf0e00000L // Per-pin priority must be >= this to trigger
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#define PLIC_THRSHLD 0xf0e00000L // Per-pin priority must be >= this to trigger
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#define PLIC_CLAIM 0xf0e00004L // Claim & completion register address
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#define PLIC_CLAIM 0xf0e00004L // Claim & completion register address
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#define PLIC_EXT_IRQ_BASE 0 // CHECKME/FIXME.
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#define PLIC_EXT_IRQ_BASE 0
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static inline unsigned int irq_getie(void)
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static inline unsigned int irq_getie(void)
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{
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{
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