Florent Kermarrec
c311f98cfa
soc/add_sdcard: emulator clocking moved to litesdcard.
2020-06-03 13:43:44 +02:00
Florent Kermarrec
382f239e74
software/libsdcard: keep SDCARD_DEBUG enabled for now, fix typos.
2020-06-03 13:38:34 +02:00
Florent Kermarrec
20bbdaaf6b
soc/add_sdcard: remove Timer (unused).
2020-06-03 13:13:07 +02:00
Florent Kermarrec
ab447df922
software/liblitesdcard: review/simplify (code is over-complicated, revert part of the old code and write a minimal test for now).
2020-06-03 13:12:45 +02:00
Florent Kermarrec
ee4056cfec
software/liblitesdcard: remove sdtimer functions (unused).
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sdtimer was used to evaluate performance but is no longer used.
2020-06-03 11:11:45 +02:00
enjoy-digital
ecfa44e5aa
Merge pull request #556 from antmicro/mglb/symbiflow-fixes
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Symbiflow toolchain support: fix part name and clock frequency
2020-06-02 16:33:40 +02:00
Mariusz Glebocki
635a61e306
targets/arty: use sys_clk_freq = 60MHz for Symbiflow toolchain
2020-06-02 16:23:08 +02:00
Mariusz Glebocki
5071ef3ef7
build/xilinx/symbiflow: remap part name
2020-06-02 16:23:08 +02:00
Florent Kermarrec
55723f138b
software/liblitedram: revert sdrsw() in sdrlevel: this is still required for sdrlevel command.
2020-06-02 16:14:53 +02:00
enjoy-digital
ddcf68c062
Merge pull request #553 from ozbenh/sim-autoinit
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sdram: Unconditionally switch to SW control before inits
2020-06-02 15:49:00 +02:00
enjoy-digital
47bb3d7990
Merge pull request #557 from antmicro/mor1kx_linux_booting
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bios: boot: Boot linux on mor1kx with external device tree and rootfs
2020-06-02 15:45:52 +02:00
Florent Kermarrec
10ff9d765f
CHANGES: update and change added features order.
2020-06-02 15:05:46 +02:00
Mateusz Holenko
f1e7d73e48
bios: boot: Boot linux on mor1kx with external device tree and rootfs
2020-06-02 14:57:48 +02:00
Florent Kermarrec
5d202ddb97
test: update.
2020-06-02 13:51:48 +02:00
Florent Kermarrec
01f7947b56
targets: rename gateware-toolchain parameter to toolchain.
2020-06-02 13:44:23 +02:00
Florent Kermarrec
245985d6c5
targets/arty: integrate symbiflow changes to avoid duplication.
2020-06-02 13:37:19 +02:00
Florent Kermarrec
89106873db
build/generic_platform: add default_clk constraints only when used.
2020-06-02 13:34:09 +02:00
Florent Kermarrec
0cd613ccb8
build/xilinx/symbiflow: reuse .xdc generation from Vivado to avoid duplication, fix copyright.
2020-06-02 13:21:12 +02:00
Florent Kermarrec
80ec5eca76
boards/arty: remove specific arty_symbiflow platform and adapt target to use standard platform.
2020-06-02 12:18:12 +02:00
Florent Kermarrec
af928b2626
xilinx/simbiflow: add simple symbiflow_device re-mapping.
2020-06-02 12:15:38 +02:00
enjoy-digital
5104d07a13
Merge pull request #551 from antmicro/mglb/symbiflow-toolchain-xilinx-7-support
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Add Symbiflow toolchain support for Xilinx 7-series
2020-06-02 11:55:33 +02:00
Tim Ansell
77139289f8
Merge pull request #552 from ozbenh/memspeed-long
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sdram: Use unsigned long for memory test
2020-06-01 15:23:03 -07:00
Benjamin Herrenschmidt
6239eac130
sdram: Use unsigned long for memory test
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This makes it twice as fast on 64-bit CPUs when using a 64-bit bus :-)
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2020-06-02 08:08:42 +10:00
Mariusz Glebocki
7434376c07
test/test_targets: add arty_symbiflow
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Signed-off-by: Mariusz Glebocki <mglebocki@antmicro.com>
2020-06-01 21:41:56 +02:00
Mariusz Glebocki
ae121aacdf
targets: add arty_symbiflow
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Signed-off-by: Mariusz Glebocki <mglebocki@antmicro.com>
2020-06-01 21:41:56 +02:00
Mariusz Glebocki
2bb2fbdbea
platforms: add arty_symbiflow
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Signed-off-by: Mariusz Glebocki <mglebocki@antmicro.com>
2020-06-01 21:41:17 +02:00
Mariusz Glebocki
bd702397d1
build/xilinx: add Symbiflow toolchain support
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Signed-off-by: Mariusz Glebocki <mglebocki@antmicro.com>
2020-06-01 21:36:28 +02:00
enjoy-digital
a116578c82
Merge pull request #550 from antmicro/jboc/spd-read
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bios/litedram: Add command to verify SPD contents with the one used during generation
2020-06-01 21:17:40 +02:00
enjoy-digital
b98a919226
Merge pull request #549 from antmicro/mglb/fix-vivado-yosys
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build/xilinx: do not assume build name is "top"
2020-06-01 19:58:01 +02:00
Benjamin Herrenschmidt
4a6256a50d
sdram: Unconditionally switch to SW control before inits
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This will allow the controller to default to HW control which means
the sim model can be used without specific initializations
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2020-06-01 23:44:09 +10:00
Mariusz Glebocki
a4e8323485
build/xilinx: do not assume build name is "top"
2020-06-01 13:28:54 +02:00
enjoy-digital
5cc7a98845
Merge pull request #547 from gsomlo/gls-fix-sdcard-status
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soc/software/litesdcard: update for response register back to 128 bits
2020-06-01 11:37:05 +02:00
Florent Kermarrec
395af900fd
interconnect/wishbone/DownConverter: skip accesses on slave when sel==0 and simplify.
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Improve efficiency for 64-bit CPU accessing only the 32-bit LSBs/MSBs.
2020-06-01 11:06:23 +02:00
Florent Kermarrec
511832a911
soc/interconnect/axi: generate wishbone.sel for reads.
2020-06-01 10:58:45 +02:00
Florent Kermarrec
4f82a36afd
soc/software: only keep 32-bit CSR alignment support.
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64-bit support was added for 64-bit CPU because of limitation of the hardware
on CSR accesses. Now that the Wihhbone2CSR bus handles wishbone.sel, this is no
longer required.
2020-06-01 10:01:14 +02:00
Gabriel Somlo
28290efd00
soc/software/litesdcard: update for response register back to 128 bits
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The additional (17th) byte returned via the response register was
ignored by software (bios and kernel), so LiteSDCard was updated
to only return the (original, useful) 128 bits.
This patch updates the LiteSDCard code in the LiteX bios to only
expect those 128 bits, and to do so in a manner that's portable
across CSR data widths and alignments.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
2020-05-30 18:12:51 -04:00
Florent Kermarrec
759367752c
wishbone/wishbone2csr: use wishbone.sel on CSR write.
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CSR write is only done if wishbone.sel != 0. This should avoid the need for 64-bit
CSR alignment on 64-bit CPUs since a 64-bit Wishbone write access targeting only the
32-bit LSB or MSB will be splitted in 2x32-bit accesses: one with sel=0xf, one with sel=0.
2020-05-30 15:22:02 +02:00
Florent Kermarrec
b1ec092e88
soc/software/litesdcard: use new send register to send command and remove CSR8_CMD_FIX.
2020-05-29 20:15:02 +02:00
Florent Kermarrec
efcba14b1b
platforms/nexys_video: add spisdcard pins.
2020-05-29 19:36:33 +02:00
Florent Kermarrec
119ce56f6c
targets/nexys_video: add spi-sdcard and sdcard support.
2020-05-29 19:26:29 +02:00
Florent Kermarrec
cc5950178d
plaforms/nexys_video: keep up to date with litex-boards.
2020-05-29 19:26:03 +02:00
Florent Kermarrec
5cc564fb8f
targets: simplify Ethernet/Etherbone integration on targets with both.
2020-05-29 19:22:35 +02:00
Florent Kermarrec
55c7461e7b
bios/cmds/cmd_litesdcard: rewrite comments/descriptions.
2020-05-29 18:51:24 +02:00
Florent Kermarrec
6cb03963f3
bios/main: replace / with -.
2020-05-29 18:40:54 +02:00
enjoy-digital
5dd5f97b88
Merge pull request #545 from gsomlo/gls-fix-mmptr
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csr: fix simple accessor alignment
2020-05-29 18:32:30 +02:00
Gabriel Somlo
3e1b17d459
csr: fix simple accessor alignment
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MMPTR should always follow CSR alignment, NOT CSR data width.
(the latter merely indicates how many bits within a MMPTR are
actually populated).
Fixup for commit #4a5072a.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
2020-05-29 12:03:05 -04:00
Florent Kermarrec
6c1e2d8413
software/liblitesdcard: replace hexdump with dump_bytes already available in the BIOS.
2020-05-29 17:15:20 +02:00
Florent Kermarrec
9e068a7494
soc/add_sdcard: add with_emulator parameter to use SDCard emulator (from Google Project Vault) and integrate it in litex_sim.
2020-05-29 16:07:40 +02:00
Jędrzej Boczar
a433c837e0
bios/litedram: add option to verify SPD EEPROM memory contents
2020-05-29 15:14:54 +02:00
Jędrzej Boczar
1692dfbf61
build/sim/spdeeprom: use hex format when loading from file
2020-05-29 14:56:56 +02:00