LiteX rightfully assumes that most often the target software must
be cross-compiled from an x86 host platform. However, LiteX can be
also built on a 'linux-riscv64' platform (e.g. Fedora's riscv64
port), where the software for riscv64 targets should be compiled
using the native toolchain.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Get rid of NETBOOT_LINUX_VEXRISCV/FLASHBOOT_LINUX_VEXRISCV defines
and use information about CPU_TYPE and CPU_VARIANT instead.
Use common kernel/rootfs/device tree/emulator images layout
when booting over network and from flash.
- Update a few additional places to use DFII_ADDR_SHIFT instead of
a hard-coded 4, which assumed 32-bit alignment.
- Force 64-bit alignment Rocket -- the only supported configuration!
This is a fixup for commit f4770219, tested on Rocket and 64bit Linux.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
While testing my Ethernet DMA, I renamed the `ethmac` module to `ethmac_dma` so that it wouldn't be used from the BIOS, but I got an undefined reference to `eth_init` because `bios.c` checks different CSR defines than the code that defines `eth_init`.
Remove optimizations targeted specifically at rv32 architecture,
allowing memcpy to work on all word sizes.
Since this is "only" the BIOS, it is also arguably better to
optimize for size rather than performance, given that control
will be quickly handed over to some other program being loaded.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Simulate a Rocket-based 64-bit LiteX SoC with the following command:
litex/tools/litex_sim.py [--with-sdram] --cpu-type=rocket
NOTE: Synthesizes to FPGA and passes timing at 50MHz on nexys4ddr
(with vivado) and ecp5versa (with yosys/trellis/nextpnr), but at
this time does not yet properly initialize physical on-board DRAM.
On ecp5versa, using '--with-ethernet', up to 97% of the available
TRELLIS_SLICE capacity is utilized.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
When generating arch-specific include files (generated/[mem|csr].h)
ensure address literal defines are suffixed by 'L', denoting their
'unsigned long' type. This inhibits compiler warnings when values
computed based on these constants are cast to pointers.
Also ensure csr_[read|write][b|w|l]() function declarations have
'unsigned long' address arguments.
Finally, restore the correct (32-bit, (unsigned *)) expected
behavior of the MMPTR() macro, inadvertently converted to an
arch-specific sized access (unsigned long *) by commit 5c2b8685.
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
First ARP request does not seem to be transmitted (the link is probably not
fully established). Reduce the timeout between tries and increase number of
tries.
