Joel Stanley
b30dd0b5c6
test_cpu: Add NeoRV32 to tested CPUs
...
With CI supporting GHDL to convert VHDL to Verilog the neorv32
simulation can be tested.
Fixes https://github.com/enjoy-digital/litex/issues/1320
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-21 15:20:49 +10:30
Joel Stanley
b0b57491bb
test_cpu: Add Microwatt to tested CPUs
...
Now that LiteX can convert from VHDL to Verilog using GHDL, and the
required dependencies are installed in the CI environment, start testing
Microwatt.
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-14 22:09:47 +10:30
Joel Stanley
b340b86975
test_cpu: Set number of verilator jobs
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By default verilator will be built with -j with no arguments, spawning
many processors. This causes large designs to failure in CI (probably
due to exhausting the memory of the build box):
Error: Process completed with exit code 143.
Set the number of jobs to the number of CPUs in the system. This allows
designs such as Microwatt to build in CI.
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-11-14 22:05:54 +10:30
Florent Kermarrec
ec126f0e4d
test/test_cpu: Move ibex to untested_cpus since seems to be broken since 2022.11.12.
2022-11-14 09:51:37 +01:00
Florent Kermarrec
9c3663f3d2
test/test_cpu: Re-enable cv32e40p/marocchino.
2022-06-29 11:15:48 +02:00
enjoy-digital
ec9d1c4fd0
CI: Disable more CPUs.
2022-06-27 22:43:01 +02:00
Florent Kermarrec
f898423390
test/test_cpu: Diable mor1kx/picorv32 for now due to issue with newer Verilator.
2022-06-27 19:54:50 +02:00
Florent Kermarrec
3f8cafeb58
test/test_cpu: Disable cva5 and enable marocchino/mor1kx.
2022-06-03 17:14:52 +02:00
Florent Kermarrec
c0fc342823
test/test_cpu: Simplify using subTest/lists, test more RISC-V CPUs and comments for untested CPUs.
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Also use --opt-level=O0 to reduce compilation time (execution is a bit slower but since we are only
executing the BIOS here, total test time is still reduced).
2022-06-03 16:16:21 +02:00
Florent Kermarrec
69451fad09
test/test_cpu: Disable test_cva6 for now since seems to be failing.
2022-05-25 09:32:30 +02:00
Massimiliano Giacometti
c95ddbbff8
UART_POLLING
2022-05-19 15:07:46 +02:00
Florent Kermarrec
ed6a6a83a9
litex_setup: Switch to manual install for Amaranth/Minerva (No longer supporting Python 3.6).
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We could revert when upgrading LiteX python requirement.
2022-04-04 15:39:05 +02:00
Florent Kermarrec
e50ff33c6e
test/test_cpu: Disable Minerva test for now.
2021-12-13 16:51:23 +01:00
Florent Kermarrec
12d53790a9
test/test_cpu: Prepare microwatt/lm32 test.
...
microwatt: Still requires Yoys/GHDL-Synth installation.
lm32: Still requires prebuilt toolchain.
2021-10-26 16:37:38 +02:00
Florent Kermarrec
e617f52e34
test/test_cpu: Comment test_mor1kx for now (test work but issue seems related to the pre-built toolchain).
2021-10-26 16:30:02 +02:00
Florent Kermarrec
cb9f0fb1b0
ci/test_cpu: Install OpenRISC GCC toolchain in CI and add mor1kx to test_cpu.
2021-10-26 15:45:43 +02:00
Florent Kermarrec
71a91eac15
test: Rename test_boot.py to test_cpu.py.
2021-10-26 08:35:16 +02:00