Florent Kermarrec
36ea82546f
litex_setup: Allow specifying tag for --init --update.
...
Allow installing from release tags, ex to install 2022.04 from scratch:
./litex_setup.py --tag=2022.04 --init --install --user.
To update to 2022.04 from a previous installation:
./litex_setup.py --tag=2022.04 --update
To update to latest (dev):
./litex_setup.py --updatelitex_setup: Allow specifying tag for --init --update.
2022-05-04 19:26:22 +02:00
Florent Kermarrec
ed6a6a83a9
litex_setup: Switch to manual install for Amaranth/Minerva (No longer supporting Python 3.6).
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We could revert when upgrading LiteX python requirement.
2022-04-04 15:39:05 +02:00
Andrew Dennison
3f72cd30b1
litex_setup: change to installing with pip
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fixes: EasyInstallDeprecationWarning: easy_install command is deprecated. Use build and pip and other standards-based tools.
2022-03-23 11:22:56 +11:00
Florent Kermarrec
ece286b15d
litex_setup: Rename --status to --freeze and generate freezed git_repos dict.
2022-03-08 18:12:11 +01:00
Florent Kermarrec
0a40616df9
litex_setup.py: Remove LiteHyperBus dependency (not currently used by LiteX-Boards).
...
We could add it back as a dependency if the simple/portable core is no longer enough for
regular use cases.
2022-03-01 09:27:23 +01:00
Dolu1990
a3243e32ec
cpu/naxriscv Add pythondata support
2022-02-17 14:59:56 +01:00
Florent Kermarrec
855bc26f16
litex_setup/cv32e41p: Only install it with full config.
2022-02-15 09:45:23 +01:00
enjoy-digital
2993928b31
Merge pull request #1207 from pcotret/cv32e41p_support
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Add support for the CV32E41P RISC-V CPU
2022-02-15 09:43:03 +01:00
Pascal Cotret
86373605ce
add pythondata for cv32e41p
2022-02-14 22:06:25 +01:00
Joel Stanley
420934e206
microwatt: Move to latest and add countzero module
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Mcrowatt has renamed countbits to countzero. Update to the latest and
update the file list.
Signed-off-by: Joel Stanley <joel@jms.id.au>
2022-02-07 12:22:11 +10:30
Florent Kermarrec
af26d939d0
litex_setup: Declare python3 in top and use it.
2022-01-26 14:49:02 +01:00
enjoy-digital
f82f769794
Merge pull request #1185 from benstobbs/master
...
litex_setup.py on Windows: Change install "python3" to current interpreter
2022-01-26 14:45:00 +01:00
Florent Kermarrec
4ab45d72a8
litex_setup: Add --status argument to display Git status of repositories.
2022-01-26 14:44:04 +01:00
Florent Kermarrec
d2d8d902e1
litex_setup/print_status: Add underline parameter and use it.
2022-01-26 14:20:41 +01:00
Ben Stobbs
e0149eb814
change repo install python interpreter to current interpreter
2022-01-25 22:46:33 +00:00
Florent Kermarrec
9f1a847e93
litex_setup: Add Marocchino CPU to full install.
2022-01-17 09:02:34 +01:00
Florent Kermarrec
c424e51df4
litex_setup: Improve script status prints.
2022-01-05 14:52:21 +01:00
Florent Kermarrec
a6e2a529dc
litex_setup: Add initial installs config support (minimal, standard, full).
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Can be selected with --config=minimal/standard/full. This avoid installing all the
CPUs when only the popular ones will be used. Installation can be updated later
and switched to full installation with --config=full.
2022-01-05 13:56:35 +01:00
Florent Kermarrec
04e73b2e33
litex_setup.py: Switch git clone to git@github.com URLs when in --dev mode.
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Simplify dev/maintenance.
2022-01-05 10:07:35 +01:00
whitequark
9329d3f092
litex_setup: nMigen has been renamed to Amaranth HDL.
2021-12-10 17:41:30 +00:00
Florent Kermarrec
0503188661
litex_setup/riscv_gcc_toolchain_download: Add Fedora support (get linux-centos6).
2021-11-26 14:21:26 +01:00
Florent Kermarrec
af6b6c94b8
litex_setup: Use fixed sha1 for pythondata-cpu-ibex.
2021-11-16 18:16:05 +01:00
Florent Kermarrec
f6562195d5
litex_setup: Make compat_args optional, fix dev mode.
2021-10-26 15:16:43 +02:00
Florent Kermarrec
dab4845c9b
litex_setup: Handle download of PowerPC/OpenRisc GCC toolchains.
2021-10-26 15:11:28 +02:00
Florent Kermarrec
71b319eeaf
litex_setup: Switch to argparse and handle retro-compatibility.
2021-10-26 14:37:08 +02:00
Florent Kermarrec
e3b5734cb1
litex_setup: Add common gcc_toolchain_download function and use it to download the different toolchains.
2021-10-26 12:40:43 +02:00
Florent Kermarrec
d6ce5d3afa
litex_setup: Fix missing repos.
2021-10-26 12:01:21 +02:00
Florent Kermarrec
a6d076f810
litex_setup: Reorganize code with functions.
2021-10-26 11:36:38 +02:00
Florent Kermarrec
5c0e951dc3
litex_setup: Cleanup/Simplify.
2021-10-26 10:49:34 +02:00
Florent Kermarrec
9b4c7e8288
README/litex_setup: Remove reference to LiteVideo to encourage use of LiteX's VideoTerminal/Out core.
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LiteVideo is not longer maintained, does not have CI and is messy (code is ~10 years old where we were
still experimenting the innovative approach with Migen). The core is kept since can be useful as reference
for Video Input and for projects using it but it is not recommended for new designs.
2021-10-26 08:21:00 +02:00
Florent Kermarrec
af66f8d2ec
litex_setup: Switch to pythondata-cpu-ibex.
2021-10-23 17:26:25 +02:00
Florent Kermarrec
8945d74aa3
litex_setup: Bump pythondata-misc-opentitan (and update Get SHA1 command).
2021-10-19 15:47:24 +02:00
Florent Kermarrec
d1bb62b5fb
litex_setup: Bump pythondata-cpu-microwatt to 0xdad611c.
2021-10-19 14:44:12 +02:00
Florent Kermarrec
4494e98549
litex_setup: Add link to bootlin prebuilt PowerPC/OpenRisc toolchains.
2021-10-19 14:41:42 +02:00
Florent Kermarrec
f92a185109
litex_setup: Fix git checkout to specific version (we are using short sha1 hashes).
2021-10-18 08:19:11 +02:00
Florent Kermarrec
9f0a03100d
litex_setup: Add more comment, fix checkout when sha1 starting with 0.
2021-10-07 19:03:29 +02:00
Michal Sieron
c0e7e3acd3
Revert litex_setup_url change
2021-09-28 12:35:20 +02:00
Florent Kermarrec
54623dbe26
litex_setup: Update picolibc url (now on litex-hub).
2021-09-27 18:15:10 +02:00
Florent Kermarrec
746d698b49
litex_setup.py: Revert LiteX url.
2021-09-27 16:15:16 +02:00
Michal Sieron
514754bedf
Get pythondata-software-picolibc from antmicro
2021-09-16 10:41:05 +02:00
Michal Sieron
fc0fa88e33
Update litex_setup.py to use forked codebase
2021-09-16 10:41:05 +02:00
Florent Kermarrec
78c1751c47
litex_setup: Use fixed version of opentitan for ibex CPU. (ibex has evolved since initial support).
2021-08-13 16:27:50 +02:00
Florent Kermarrec
bd1463514b
litex_setup: Remove Travis specific code (CI no longer run on Travis).
2021-06-08 10:49:28 +02:00
Florent Kermarrec
acebc949c6
litex_setup: Add USB OHCI pythondata.
2021-06-01 10:29:49 +02:00
Florent Kermarrec
82c1f5dccb
litex_setup/ibex: add pythondata-misc-opentitan to litex_setup and use it for Ibex CPU.
2021-02-17 08:07:07 +01:00
Florent Kermarrec
61034fe0f9
litex_setup/update: do a git submodule update --init --recursive on repos with recursive set to True.
...
Simplify for example pythondata-cpu-vexriscv-smp updates.
2021-01-27 07:55:59 +01:00
Florent Kermarrec
b9e0c95c18
cpu/microwatt: use 0xf9807b6 and fix compilation, working with IRQs :)
...
Tested with:
/arty.py --cpu-type=microwatt --cpu-variant=standard+irq --integrated-rom-size=0x10000 --build --load
__ _ __ _ __
/ / (_) /____ | |/_/
/ /__/ / __/ -_)> <
/____/_/\__/\__/_/|_|
Build your hardware, easily!
(c) Copyright 2012-2020 Enjoy-Digital
(c) Copyright 2007-2015 M-Labs
BIOS built on Dec 30 2020 15:59:16
BIOS CRC passed (fb76e85d)
Migen git sha1: d42aa6f
LiteX git sha1: 74844db3
--=============== SoC ==================--
CPU: Microwatt @ 100MHz
BUS: WISHBONE 32-bit @ 4GiB
CSR: 32-bit data
ROM: 64KiB
SRAM: 8KiB
L2: 8KiB
SDRAM: 262144KiB 16-bit @ 800MT/s (CL-6 CWL-5)
--========== Initialization ============--
Initializing SDRAM @0x40000000...
Switching SDRAM to software control.
Write latency calibration:
m0:0 m1:0
Read leveling:
m0, b0: |00000000000000000000000000000000| delays: -
m0, b1: |00000000000011111111111111100000| delays: 19+-07
m0, b2: |00000000000000000000000000001111| delays: 30+-02
m0, b3: |00000000000000000000000000000000| delays: -
m0, b4: |00000000000000000000000000000000| delays: -
m0, b5: |00000000000000000000000000000000| delays: -
m0, b6: |00000000000000000000000000000000| delays: -
m0, b7: |00000000000000000000000000000000| delays: -
best: m0, b01 delays: 19+-07
m1, b0: |00000000000000000000000000000000| delays: -
m1, b1: |00000000000011111111111111000000| delays: 19+-07
m1, b2: |00000000000000000000000000001111| delays: 30+-01
m1, b3: |00000000000000000000000000000000| delays: -
m1, b4: |00000000000000000000000000000000| delays: -
m1, b5: |00000000000000000000000000000000| delays: -
m1, b6: |00000000000000000000000000000000| delays: -
m1, b7: |00000000000000000000000000000000| delays: -
best: m1, b01 delays: 19+-06
Switching SDRAM to hardware control.
Memtest at 0x0000000040000000 (2MiB)...
Write: 0x40000000-0x40200000 2MiB
Read: 0x40000000-0x40200000 2MiB
Memtest OK
Memspeed at 0x0000000040000000 (2MiB)...
Write speed: 32MiB/s
Read speed: 54MiB/s
--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found
--============= Console ================--
litex>
2020-12-30 16:20:20 +01:00
Florent Kermarrec
c169494793
litex_setup: detect and allow execution from a cloned LiteX repository.
...
Others dependencies will be installed alongside the Litex repository.
2020-09-10 13:19:34 +02:00
Florent Kermarrec
59b95fad9c
litex_setup: fix vexriscv-smp repository.
2020-07-28 16:56:32 +02:00
Dolu1990
aa57c7a25e
soc/cores/cpu/vexriscv_smp integration
2020-07-28 16:20:16 +02:00