5 commits

Author	SHA1	Message	Date
Florent Kermarrec	3f7406a937	various fixes and simplifications, SATA1 & SATA2 OK	2014-10-28 02:15:19 +01:00
Florent Kermarrec	110580eb2e	add .payload. to Sink and Source to be compatible with upstream Migen	2014-09-30 11:03:36 +02:00
Florent Kermarrec	d47917e480	simplify and clean up	2014-09-30 00:50:03 +02:00
Florent Kermarrec	b47153fbfa	fix alignment (still some transmissions errors --> need to check clocks and resets)	2014-09-29 15:37:35 +02:00
Florent Kermarrec	c27f24c4c0	reorganize code ... - use sys_clk of 166.66MHz and using it instead of sata clk. - rename clocking to CRG since it also handles resets. - create datapath and move code from gtx.	2014-09-27 15:34:28 +02:00