Florent Kermarrec
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54597f1bfc
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use new submodules/specials/clock_domains automatic collection
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2015-01-14 13:55:18 +01:00 |
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Florent Kermarrec
|
d860813dec
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use new direct access on endpoints
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2014-10-16 17:57:30 +02:00 |
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Florent Kermarrec
|
9649b1497c
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uart2wishbone: fix missing payload.d
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2014-10-16 09:37:43 +02:00 |
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Florent Kermarrec
|
2319ee0ab7
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uart2wishbone: always use payload.d and not .d
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2014-10-15 12:13:22 +02:00 |
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Florent Kermarrec
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d0c9838dca
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uart2wishbone: share UARTRX and UARTTX with MiSoC
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2014-10-10 15:15:58 +02:00 |
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Florent Kermarrec
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2fb418a373
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use new MiSoC UART with phase accumulators
this will allow to speed up MiLa reads
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2014-09-24 21:56:15 +02:00 |
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Florent Kermarrec
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6ffed70b59
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uart2wishbone: disconnect rx line from shared pads when bridge is selected
(avoid CPU crash when we communicate with the bridge)
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2014-08-03 13:15:56 +02:00 |
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Florent Kermarrec
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f4e6cebab2
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clean up
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2014-08-03 11:44:27 +02:00 |
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Florent Kermarrec
|
8719206a3a
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uart2wishbone: add default baudrate
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2014-06-05 15:13:20 +02:00 |
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Florent Kermarrec
|
7a489b3135
|
refactor code
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2014-04-20 23:53:33 +02:00 |