3 Commits

Author	SHA1	Message	Date
Florent Kermarrec	6107b7844a	test implementation on all targets and fix issues	2015-02-28 12:04:51 +01:00
Florent Kermarrec	8564b7eb6a	soc: move SDRAMSoC to a separate sdram.py file (ideally part of SDRAMSoC should move mem/sdram)	2015-02-28 11:44:14 +01:00
Florent Kermarrec	69e869893d	remane GenSoC to SoC (more coherent and we will add support for multiple SoCs with their own Wisbbone/CSR buses in the future)	2015-02-28 11:36:15 +01:00