Sebastien Bourdeauducq
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1897b74f97
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genlib/record: add eq
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2013-03-24 00:50:33 +01:00 |
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Sebastien Bourdeauducq
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9d7c679b8c
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genlib/fifo: simple synchronous FIFO
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2013-03-22 18:18:38 +01:00 |
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Sebastien Bourdeauducq
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a94bf3b2c5
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genlib/cdc/MultiReg: output clock domain defaults to sys
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2013-03-21 10:40:02 +01:00 |
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Sebastien Bourdeauducq
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7a06e9457c
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Lowering of Special expressions + support ClockSignal/ResetSignal
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2013-03-18 18:36:50 +01:00 |
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Sebastien Bourdeauducq
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2f522bdd9f
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genlib/cdc/MultiReg: implement rename_clock_domain + get_clock_domains
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2013-03-15 19:50:24 +01:00 |
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Sebastien Bourdeauducq
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e2d156ef64
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genlib/cdc/MultiReg: remove idomain
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2013-03-15 19:49:24 +01:00 |
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Sebastien Bourdeauducq
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a878db1e3c
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genlib: clock domain crossing elements
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2013-02-23 19:03:35 +01:00 |
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Sebastien Bourdeauducq
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f9acee4e68
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corelogic -> genlib
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2013-02-22 23:19:37 +01:00 |