a330e9fda5
cores/spi_flash: Deprecate SPI Flash MMAPed cores (Designs have been switched with LiteSPI).
2022-01-07 19:08:03 +01:00
30a99582ae
litex/compat: Fully deprecate up5kspram renaming. (Warning to suggest change has been here for > 1 year).
2022-01-07 18:40:12 +01:00
c46824153d
litex/compat: Fully deprecate soc_sdram (Warning to suggest change has been here for > 1 year).
2022-01-07 18:38:56 +01:00
c010a98719
cpu: Add default set_reset_address function to CPU that will be overrided by each CPU (avoid hasattr check).
2022-01-07 15:17:37 +01:00
cb13f71b56
build/openocd/stream: Add get_ir method and use it to compute IR and handle specific ECP5 case.
...
JTAG-UART/JTAGBone on ECP5 non longer requires --jtag-chain=49 command.
2022-01-07 11:39:05 +01:00
f404877353
soc/SoCBusHandler: Add io_regions_check attribute and and disable IO region check with CPUNone.
2022-01-07 10:47:47 +01:00
e0961d7cb1
cores/cpu: Add missing Gowin EMCU comment.
2022-01-07 10:46:58 +01:00
23214638e4
cores/cpu: Allow multiple calls to set_reset_address (= override) since reset_adress is not not necessarily known at SoC creation.
...
When booting from SPI Flash, things will be done in the following order:
- SoC creation.
- SPI Flash peripheral creation (with dynamic mapping).
- CPU reset address can then be set.
2022-01-07 09:07:34 +01:00
5c278ae437
cpu/rocket/core: Move IO Region (ROM/SRAM can't be in an IO Region).
2022-01-06 15:32:31 +01:00
23b9d73354
integration/soc: Improve mem_map overriding display.
2022-01-06 13:46:21 +01:00
5363d61859
Merge pull request #1151 from fjullien/fix_wb_slave_cache_configuration
...
soc: raise an error if adding a SoCRegion with incoherent cache configuration
2022-01-06 10:12:20 +01:00
330144021b
soc: raise an error if adding a SoCRegion with incoherent cache configuration
2022-01-06 09:55:53 +01:00
153f9e9f6c
integration/builder: Use custom Formatter settings to improve readibility and minor cleanups.
2022-01-05 19:23:06 +01:00
1279ebebe8
build: Create toolchain parser group to improve --help readibility and cleanup.
2022-01-05 18:53:43 +01:00
0c1f0b17b4
integration/soc_core: Create soc parser group to improve --help readibility.
2022-01-05 18:30:04 +01:00
ec75228a72
builder: Create builder parser group to improve --help readibility.
2022-01-05 18:29:38 +01:00
67fa433efa
tools: Switch most the tools to argparse.ArgumentDefaultsHelpFormatter and uniformize help style.
2022-01-05 16:04:31 +01:00
54a137ef9f
builder: Use argparse.ArgumentDefaultHelpFormatter to automatically show default in help.
2022-01-05 16:03:38 +01:00
6f3f695d61
tools/litex_sim: Minor cleanups.
2022-01-05 15:20:27 +01:00
c424e51df4
litex_setup: Improve script status prints.
2022-01-05 14:52:21 +01:00
a6e2a529dc
litex_setup: Add initial installs config support (minimal, standard, full).
...
Can be selected with --config=minimal/standard/full. This avoid installing all the
CPUs when only the popular ones will be used. Installation can be updated later
and switched to full installation with --config=full.
2022-01-05 13:56:35 +01:00
04e73b2e33
litex_setup.py: Switch git clone to git@github.com URLs when in --dev mode.
...
Simplify dev/maintenance.
2022-01-05 10:07:35 +01:00
ba79224939
Bump year.
2022-01-05 09:21:08 +01:00
3fde251216
CHANGES: Set release date.
2022-01-05 08:53:10 +01:00
e21044641e
cores/cpu/vexriscv_smp: Force wishbone_memory mode when no direct memory_buses.
...
This ensures a path for memory accesses will be created LiteDRAM is not used (ex with an HyperRAM memory).
2022-01-04 15:16:31 +01:00
f04a3dcc50
CHANGES: List changes since 2021.08.
2022-01-03 19:29:05 +01:00
c6dff1ea7e
Merge pull request #1141 from sergachev/zynq7000_bios
...
Zynq7000 ARM BIOS support
2022-01-03 17:57:40 +01:00
3b05fa57d4
Merge pull request #1140 from sergachev/cleanup_defaults
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argparse: deduplicate defaults in help messages
2022-01-03 14:59:19 +01:00
79d0f0a893
interconnect/wishbone/axi: Automatically get InterconnectShared's shared data_width from first master.
2022-01-03 14:53:06 +01:00
90c204e87f
Merge pull request #1148 from tongchen126/master
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soc/software/bios/cmds/cmd_mem.c: fix number of required params
2022-01-03 14:40:39 +01:00
a8c8e4e3cf
litex/soc/interconnect/wishbone.py: add data_width param
2021-12-31 13:27:27 +08:00
e87e7ff31c
soc/software/bios/cmds/cmd_mem.c: fix number of required params
2021-12-30 20:43:05 +08:00
8ac3fbc039
soc/cores/led: Split LED-SHIFT in LED-READ/LED-SHIFT, simplify and fix off by one error.
2021-12-27 14:06:04 +01:00
2c68135eb4
Merge pull request #1143 from enjoy-digital/Dolu1990-patch-1
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tools/litex_json2dts_linux.py fix double {{
2021-12-27 12:34:19 +01:00
f4967cfb85
tools/litex_json2dts_linux.py fix double {{
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A string with a {{ was missing the .format call, generating some broken dts
2021-12-26 12:17:33 +01:00
6b207f876b
software/bios: add separate linker file for zynq
2021-12-22 03:01:25 +01:00
d75dd653bc
integration/soc: unblacklist zynq
2021-12-22 03:01:06 +01:00
0c57021c3c
software: add minimal xilinx library makefile
2021-12-22 03:00:05 +01:00
6705972713
builder: enable bios compilation on zynq
2021-12-22 02:59:40 +01:00
76148c4930
zynq: add minimal software compilation support
2021-12-22 02:58:33 +01:00
4f39faf737
software/libc: enable compilation on arm
2021-12-22 02:57:52 +01:00
94f4dd78f2
zynq: update gcc triple, set fpu flags
2021-12-22 02:57:07 +01:00
a07a4e0e86
zynq: cleanup
2021-12-22 02:56:46 +01:00
68e40dd330
zynq: remove broken unused method
2021-12-22 02:56:21 +01:00
b7f787a461
software: disable exceptions on arm cpus (problems compiling)
2021-12-22 02:55:33 +01:00
5357d66c93
software/libc: fix missing return
2021-12-22 02:54:32 +01:00
4c20501218
software/libcompiler_rt: enable missing math operations on arm
2021-12-22 02:54:19 +01:00
490929ab65
software/libcompiler_rt: cleanup flags
2021-12-22 02:53:58 +01:00
893044275e
software/libc: remove fexceptions flag already present in common.mak
2021-12-22 02:53:24 +01:00
ab8c509396
argparse: deduplicate defaults in help messages
2021-12-22 02:45:58 +01:00
Florent Kermarrec
Franck Jullien
tongchen126
Dolu1990
Ilia Sergachev