Florent Kermarrec
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bda196fbc8
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soc/software/bios/sdram: split memtest and allow external #define of memtest sizes
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2015-11-11 13:10:03 +01:00 |
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Florent Kermarrec
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619cd8e695
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avoid forking migen, we will add custom modules in litex/gen but will use upstream migen for common modules
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2015-11-11 12:10:55 +01:00 |
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Florent Kermarrec
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3f43a49382
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soc: merge with misoc 3fcc4f116c3292020cb811d179e45ae45990101b
changes:
-software/bios: remove dataflow
-cores/identifier: replace with user-defined string
-interconnect/CSRBankArray: support read-only mappings
-targets: Added Numato Mimas V2 target
-Our libunwind changes were merged upstream.
-wishbone: update TODO
-replace Counter in Converters
-Fix CSRBankArray
-flterm: properly exit on ^C.
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2015-11-10 16:51:51 +01:00 |
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Florent Kermarrec
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3297210e48
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boards/targets/sim: get SDRAM working in simulation with sdram/model
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2015-11-10 12:57:23 +01:00 |
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Florent Kermarrec
|
4afe4a07e4
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soc/software: remove memtest (should be re-written)
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2015-11-10 12:22:08 +01:00 |
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Florent Kermarrec
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6764c06b62
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soc/sofware: remove libdyld
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2015-11-10 12:21:23 +01:00 |
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Florent Kermarrec
|
f72e172ac3
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soc/software: remove libunwind
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2015-11-10 12:16:34 +01:00 |
|
Florent Kermarrec
|
85e6716b6b
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litex/build/xilinx/programmer: remove UrJTAG and Adept
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2015-11-10 12:01:25 +01:00 |
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Florent Kermarrec
|
a775672314
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litex: get verilator simulation working and add sim target as example
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2015-11-07 23:51:37 +01:00 |
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Florent Kermarrec
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6a0f85dc42
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litex: reorganize things, first work working version
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2015-11-07 17:48:55 +01:00 |
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Florent Kermarrec
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637634f312
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import migen in litex/gen
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2015-11-07 12:22:32 +01:00 |
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Florent Kermarrec
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b028569784
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import misoc in litex/soc
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2015-11-07 12:19:30 +01:00 |