Sebastien Bourdeauducq
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b6aa40d845
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bios: automatically enable hardware memory controller and test memory
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2012-05-15 19:29:26 +02:00 |
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Sebastien Bourdeauducq
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7ecfd60368
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bios: more DDR diagnostic functions
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2012-05-14 20:07:57 +02:00 |
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Sebastien Bourdeauducq
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8d4a42887e
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ddrphy: working on hardware, simulation a bit messed up
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2012-02-24 15:44:51 +01:00 |
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Sebastien Bourdeauducq
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17b2588321
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ddrphy: reads OK, write data coming out 1/2 cycle too late
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2012-02-24 15:05:52 +01:00 |
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Sebastien Bourdeauducq
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a363eb4a36
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ddrphy: partly working
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2012-02-24 13:54:10 +01:00 |
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Sebastien Bourdeauducq
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92ac69bae3
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dfii: new design
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2012-02-23 21:21:07 +01:00 |
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Sebastien Bourdeauducq
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f35cd4a85b
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Prepare for new DDR PHY
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2012-02-19 18:43:42 +01:00 |
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Sebastien Bourdeauducq
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026457a98c
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Send SDRAM initialization sequence and answer PHY read/write requests. Obstinately refuses to work, unfortunately.
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2012-02-18 18:12:14 +01:00 |
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Sebastien Bourdeauducq
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c38de34a21
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bios: DDR initialization skeleton
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2012-02-17 18:47:04 +01:00 |