Jędrzej Boczar
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93bcc94b53
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soc/interconnect/axi: implement AXILite down-converter
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2020-07-16 17:02:49 +02:00 |
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Jędrzej Boczar
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78a631f392
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test/axi: add AXILite2CSR and AXILiteSRAM tests
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2020-07-15 12:40:39 +02:00 |
Florent Kermarrec
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04017519c8
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soc/interconnect/axi: add Wishbone2AXILite
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2019-11-20 12:32:22 +01:00 |
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Florent Kermarrec
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4b073a440a
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test/test_axi: cosmetic
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2019-11-20 11:22:39 +01:00 |
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Florent Kermarrec
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a7895e4982
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test/test_axi: remove use of rand_wait, rename rand_level to random
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2019-07-23 21:02:09 +02:00 |
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Florent Kermarrec
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c7f36ab08f
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test: add copyright header
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2019-06-23 23:31:11 +02:00 |
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Florent Kermarrec
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ab1f580470
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test/test_axi: remove litex.gen.sim import (was only useful for debug)
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2019-06-12 11:28:06 +02:00 |
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Florent Kermarrec
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5c1d980540
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soc/interconnect/axi: add burst support to AXI2Wishbone
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2019-04-29 16:49:20 +02:00 |
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Florent Kermarrec
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6de2713524
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soc/interconnect/axi: add capabilities to AXIBurst2Beat and simplify/optimize
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2019-04-29 14:02:05 +02:00 |
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Florent Kermarrec
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9cbed91b3e
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soc/interconnect/axi: add AXIBurst2Beat
Converts AXI bursts commands to AXI beats.
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2019-04-19 12:13:16 +02:00 |