Florent Kermarrec
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7afa3d61d9
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mibuild/xilinx: Xilinx's FPGAs do not necessary share the same primitives: add xilinx_s7_special_overrides and specific XilinxDDROutputS7 implementation
Fix DDROutput implementation on spartan6 (tested with LiteETH's GMII phy)
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2015-07-02 09:42:12 +02:00 |
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Florent Kermarrec
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1051878f4c
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global: pep8 (E302)
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2015-04-13 20:45:35 +02:00 |
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Florent Kermarrec
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17e5249be0
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global: pep8 (replace tabs with spaces)
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2015-04-13 20:07:07 +02:00 |
Sebastien Bourdeauducq
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aef9275c99
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mibuild/xilinx: export special_overrides dictionary
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2015-03-14 10:45:11 +01:00 |
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Sebastien Bourdeauducq
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6a979a8023
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mibuild: sanitize default clock management
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2015-03-14 00:10:08 +01:00 |
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Sebastien Bourdeauducq
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702d177c85
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mibuild: get rid of Platform factory function, cleanup
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2015-03-13 23:25:15 +01:00 |