litex/litex
Florent Kermarrec a350d2e909 soc/interconnect/stream: Add optional CSR to Multiplexer/Demultiplexer and Crossbar module with mux and demux. 2024-09-13 19:21:26 +02:00
..
build build/xilinx/vivado: Fix typo. 2024-09-13 10:39:13 +02:00
compat compat/soc_core: Fix register_mem/rom missing imports. 2022-11-09 19:11:15 +01:00
gen gen/fhdl/hierarchy: Sort instances to generate deterministic hierarchy in verilog. 2024-07-03 21:44:31 +02:00
soc soc/interconnect/stream: Add optional CSR to Multiplexer/Demultiplexer and Crossbar module with mux and demux. 2024-09-13 19:21:26 +02:00
tools sim: add HW_PREAMBLE_CRC for ethernet 2024-09-12 10:07:43 +02:00
__init__.py get_data_mod(): fix recursive exception reporting 2024-04-22 12:09:45 +10:00