Florent Kermarrec 144ee7ea9f soc: fix register_rom		2015-02-28 23:51:51 +01:00
..
com	liteeth: create example design derived from SoC that can be used on all targets with Ethernet pins	2015-02-28 23:33:00 +01:00
cpu	litescope: create example design derived from SoC that can be used on all targets	2015-02-28 22:19:24 +01:00
mem	liteXXX cores: remove setup.py and relative paths (we will install misolib of use PYTHON_PATH)	2015-02-28 22:23:48 +01:00
others	move mxcrg to others (we should integrate it in mlabs_video.py and remove the verilog file in the future)	2015-02-28 11:51:51 +01:00
soc	soc: fix register_rom	2015-02-28 23:51:51 +01:00
tools	liteeth: create example design derived from SoC that can be used on all targets with Ethernet pins	2015-02-28 23:33:00 +01:00
video	misoclib: better organization (create cores categories: cpu, mem, com, ...)	2015-02-28 09:40:44 +01:00
__init__.py	rename milkymist-ng to MiSoC	2013-11-09 15:27:32 +01:00