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litex/misoclib/mem/sdram/phy
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Robert Jordens d6c19858fa s6ddrphy: redo phase_sel, get rid of CLOCK_DEDICATED_ROUTE 2015-04-10 16:12:29 +08:00
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dfi.py sdram: use names that are more explicit for bank_a, row_a,...: bankbits, rowbits, .... Add databits to GeomSettings. 2015-03-25 16:56:29 +01:00
dfii.py sdram: use names that are more explicit for bank_a, row_a,...: bankbits, rowbits, .... Add databits to GeomSettings. 2015-03-25 16:56:29 +01:00
gensdrphy.py sdram: pass module as phy parameter, define memtype in modules and only keep phy parameter in register_sdram_phy 2015-03-25 16:57:38 +01:00
initsequence.py sdram: pass phy_settings to LASMIcon, MiniCON and init_sequence 2015-03-03 09:23:21 +01:00
k7ddrphy.py sdram: pass module as phy parameter, define memtype in modules and only keep phy parameter in register_sdram_phy 2015-03-25 16:57:38 +01:00
s6ddrphy.py s6ddrphy: redo phase_sel, get rid of CLOCK_DEDICATED_ROUTE 2015-04-10 16:12:29 +08:00
simphy.py sdram/phy/simphy: OK with DDR3 2015-03-28 01:59:55 +01:00