litex/misoc/integration
Sebastien Bourdeauducq dd7dfb0d5e soc_core: simplify settings (assume CPU and CSR present) 2015-09-29 10:19:42 +08:00
..
__init__.py reorganization WIP: flatten core structure (SDRAM still needs to be done) 2015-09-24 00:18:27 +08:00
builder.py minor fixes 2015-09-29 10:19:00 +08:00
cpu_interface.py basic out-of-tree build support (OK on PPro) 2015-09-28 20:33:37 +08:00
sdram_init.py break down sdram, improve consistency of core names 2015-09-24 15:59:55 +08:00
soc_core.py soc_core: simplify settings (assume CPU and CSR present) 2015-09-29 10:19:42 +08:00
soc_sdram.py sdram working on PPro 2015-09-26 21:51:22 +08:00