litex/misoclib
Florent Kermarrec 6b24562eea sdram: reintroduce dat_ack change (it was a small issue on wishbone writes (sending data 1 clock cycle too late) that was not detected by memtest) 2015-03-02 10:59:43 +01:00
..
com sdram: create frontend dir and move dma_lasmi/memtest/wishbone2lasmi to it 2015-03-02 08:36:39 +01:00
cpu litescope: create example design derived from SoC that can be used on all targets 2015-02-28 22:19:24 +01:00
mem sdram: reintroduce dat_ack change (it was a small issue on wishbone writes (sending data 1 clock cycle too late) that was not detected by memtest) 2015-03-02 10:59:43 +01:00
others move mxcrg to others (we should integrate it in mlabs_video.py and remove the verilog file in the future) 2015-02-28 11:51:51 +01:00
soc sdram/lasmicon: create a separate file for the crossbar and remove it from lasmibus 2015-03-02 09:18:32 +01:00
tools uart: use data instead of d on endpoint's layouts (coherency with others cores) 2015-03-01 16:56:48 +01:00
video sdram: create frontend dir and move dma_lasmi/memtest/wishbone2lasmi to it 2015-03-02 08:36:39 +01:00
__init__.py rename milkymist-ng to MiSoC 2013-11-09 15:27:32 +01:00