Florent Kermarrec 6baa07a69b soc/integration: add new soc class prorotype with SoCRegion/SoCBus/SoCCSR/SoCIRQ/SoC		2020-02-06 11:06:41 +01:00
..
cores	cpu/vexriscv: update submodule	2020-02-06 10:50:35 +01:00
doc	integration: svd: move svd generation to export	2020-02-04 23:49:08 +08:00
integration	soc/integration: add new soc class prorotype with SoCRegion/SoCBus/SoCCSR/SoCIRQ/SoC	2020-02-06 11:06:41 +01:00
interconnect	wishbone/Cache: add reverse parameter	2020-01-31 19:31:33 +01:00
software	bios/main: add LiteX tagline	2020-02-04 19:14:23 +01:00
__init__.py	litex: reorganize things, first work working version	2015-11-07 17:48:55 +01:00