litex/migen/bus
Sebastien Bourdeauducq 929cc98070 wishbone2csr: wait for WB deack 2011-12-13 17:38:59 +01:00
..
__init__.py CSR bus definitions 2011-12-05 00:16:44 +01:00
csr.py bus: fix CSR interconnect data readback 2011-12-11 20:17:12 +01:00
simple.py simplebus: export GetSigName function 2011-12-08 23:06:04 +01:00
wishbone.py wishbone: decoder: fix slave cyc generation in registered mode 2011-12-13 14:08:39 +01:00
wishbone2csr.py wishbone2csr: wait for WB deack 2011-12-13 17:38:59 +01:00