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a8b8af220a
litex
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misoclib
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com
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Florent Kermarrec
a8b8af220a
liteusb: add basic wishbone frontend (We could also reuse Etherbone in the future)
2015-05-01 20:44:59 +02:00
..
gpio
global: pep8 (E302)
2015-04-13 16:47:22 +02:00
liteeth
litescope/bridge: create a generic wishbone bridge that can be used with different phys (the phy needs to provide a sink/source with 8bits data).
2015-05-01 17:51:18 +02:00
litepcie
litescope/bridge: create a generic wishbone bridge that can be used with different phys (the phy needs to provide a sink/source with 8bits data).
2015-05-01 17:51:18 +02:00
liteusb
liteusb: add basic wishbone frontend (We could also reuse Etherbone in the future)
2015-05-01 20:44:59 +02:00
spi
global: pep8 (W262)
2015-04-13 17:02:59 +02:00
uart
com/uart: add tx and rx fifos.
2015-05-01 15:59:26 +02:00
__init__.py
misoclib: better organization (create cores categories: cpu, mem, com, ...)
2015-02-28 09:40:44 +01:00