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picorv32
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564 Commits

Author SHA1 Message Date
Austin Seipp fc71cadda4 scripts/icestorm: switch to nextpnr-ice40 
nextpnr-ice40 gives a better fMAX for this design (by about ~9Mhz for
me: ~59MHz -> ~68MHz) and is The Way Of The Future.

Signed-off-by: Austin Seipp <aseipp@pobox.com>
 2019-01-11 16:09:07 -06:00
Austin Seipp 070367c88d scripts/icestorm: touch up Makefile a bit 
This touches up the Makefile so that it:

  - uses $@, $< and $^ in more places for brevity and robustness (typo
    guards, etc)
  - tracks dependencies slightly better (e.g. .pcf file changes weren't
    tracked before)

Signed-off-by: Austin Seipp <aseipp@pobox.com>
 2019-01-11 15:59:56 -06:00
Austin Seipp 42b7477ba7 Add shell.nix for Nix-based PicoRV32 development 
The net result of this is that cd'ing into the main source directory and
running:

    $ nix-shell

will get you every tool needed to immediately do RISC-V development with
picorv32 or picosoc (assuming you're targeting ICE40 or ECP5).

The shell.nix file contains many comments on how to use the resulting
environment.

Signed-off-by: Austin Seipp <aseipp@pobox.com>
 2019-01-11 15:58:31 -06:00
Austin Seipp 9bf2fcb410 gitignore: update to ignore verilator artifacts 
Signed-off-by: Austin Seipp <aseipp@pobox.com>
 2019-01-11 13:10:43 -06:00
Clifford Wolf 9b70921103
Merge pull request #102 from emilio93/patch-2 
Update vivado scripts
 2018-11-09 13:03:48 +01:00
Emilio Rojas d7daf9b2cd use 32 bit toolchain 2018-11-08 17:52:05 -06:00
Emilio Rojas 451bf030be update to current vivado version 2018-11-08 17:51:45 -06:00
Clifford Wolf de479b0905
Merge pull request #101 from mmicko/master 
Alignment fix for global symbols fixes #97
 2018-10-30 10:59:07 +01:00
Miodrag Milanovic 2f16c46918 Alignment fix for global symbols fixes #97 2018-10-28 18:48:19 +01:00
Clifford Wolf 3a6ac16259
Merge pull request #94 from hutch31/master 
Added new testbench and linker file for ROM load
 2018-10-19 13:04:41 +02:00
Guy Hutchison 82b44105a0
Merge pull request #1 from cliffordwolf/master 
Fix typo in README.md
 2018-10-18 13:55:02 -07:00
Guy Hutchison 4e766af587 Renamed linker file 2018-10-18 20:52:46 +00:00
Guy Hutchison 5c0e137792 Removed dead code and cleanup before pull request 2018-10-18 20:51:40 +00:00
Guy Hutchison 73318eaeab Removed multiplier/divider 2018-10-18 20:33:40 +00:00
Guy Hutchison f47ac81c89 Passing with custom linker file 2018-10-18 18:47:06 +00:00
Clifford Wolf a721bb0c6e Fix typo in README.md 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-10-17 12:34:49 +02:00
Clifford Wolf ef386e8f17 Add libexpt1-dev to list of Ubuntu packages needed for building tools, closes #88 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-10-02 10:03:40 +02:00
Clifford Wolf cf613d2088
Merge pull request #90 from bobbl/master 
Fix PicoSoC firmware filename for simulation
 2018-10-01 14:22:14 +02:00
Jörg Mische cb766a3757 Fix PicoSoC firmware filename for simulation 2018-10-01 14:00:21 +02:00
Clifford Wolf 0d573311ce
Merge pull request #89 from emilio93/patch-1 
Update Risc-V website link for tools
 2018-09-30 14:27:17 +02:00
Emilio Rojas e507c54058
Update Risc-V website link for tools 
Current link ends up in 404 error
 2018-09-15 12:08:11 -06:00
Clifford Wolf 028aa757df
Merge pull request #85 from olofk/fusesoc-icebreaker 
Add FuseSoC support for icebreaker
 2018-09-03 11:02:01 +02:00
Olof Kindgren 7b9641ad97 Add FuseSoC support for icebreaker 2018-09-02 22:48:47 +02:00
Clifford Wolf 23d7bbdc8b Add rvfi_mode (set to constant 3 = M-mode) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-31 12:21:01 +02:00
Clifford Wolf e3ce4ef800
Merge pull request #82 from mattvenn/master 
fixes for hx8k board demo
 2018-08-31 12:17:41 +02:00
matt venn fabb3eaf70 fix firmware recipes 2018-08-30 22:27:34 +02:00
matt venn fe1867817d fix ifdef to include flash functions for hx8k 2018-08-30 22:27:18 +02:00
Clifford Wolf e9c5831097 Fix chown call in Makefile (for building tools) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-26 18:23:55 +02:00
Clifford Wolf 2d6d5c055b More PicoSoC firmware improvements for icebreaker 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-19 14:39:20 +02:00
Clifford Wolf 68c69136b9 Add icebreaker example PicoSoC implementation 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-19 13:38:59 +02:00
Clifford Wolf 1afe3af452 Add PicoSoC IceBreaker demo 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-18 20:17:21 +02:00
Clifford Wolf b634224ccb
Merge pull request #79 from olofk/irqconfig 
Expose ENABLE_IRQ_QREGS and PROGADDR_IRQ from picosoc.v
 2018-08-18 19:32:35 +02:00
Olof Kindgren 75aa1055f8 Expose ENABLE_IRQ_QREGS and PROGADDR_IRQ from picosoc.v 2018-08-16 22:06:26 +02:00
Clifford Wolf 7c256656c2 PicoSoC: Use RDSR1+RDCR1+WRR instead of RDAR+WRAR 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-16 14:09:12 +02:00
Clifford Wolf 89c2761f57 Update riscv-gnu-toolchain 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-14 20:54:30 +02:00
Clifford Wolf 4c1e0f47a6 Add rs232 decode to picosoc hx8kdemo test bench 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-14 14:27:09 +02:00
Clifford Wolf 28d6f97b00 Fix picosoc quad spi mode (flashio_worker must be multiple of 4 bytes) 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-14 14:26:49 +02:00
Clifford Wolf b3f292a988 Improve picosoc demo firmware, picosoc firmware build fixes 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-08-14 13:49:08 +02:00
Clifford Wolf ce9d92939a
Merge pull request #61 from mmicko/linker-script 
Created lds file (section mapping) and init for data and bss sections
 2018-08-14 13:05:56 +02:00
Clifford Wolf 2a0cff8672
Merge pull request #74 from olofk/picosoc-fusesoc_v2 
Picosoc fusesoc v2
 2018-08-14 13:04:03 +02:00
Olof Kindgren 12274e9f8a Add FuseSoC .core file for hx8kdemo 
The core file specifies targets for FPGA implementation (fusesoc
build hx8kdemo) and simulation (fusesoc run --tool=<tool>
--target=sim hx8kdemo --firmware=path/to/firmware.he).

Simulation has been tested successfully with icarus, modelsim and xsim
 2018-07-27 23:23:41 +02:00
Olof Kindgren 80f128713d Add FuseSoC .core file for picosoc 
This allows other cores to depend on the generic parts of picosoc
and use that as a base design.
 2018-07-27 23:23:41 +02:00
Olof Kindgren 262da6444c Add FuseSoC .core file for SPI Flash model 
This allows other cores to depend on spiflash. Can also be used to
run the spiflash testbench with

fusesoc run --tool=<tool> spiflash --firmware=path/to/firmware.hex

This has been tested with icarus, modelsim and xsim. Fails with isim
If --tool is left out, icarus will be used as default
 2018-07-26 23:26:43 +02:00
Clifford Wolf 9b6ea045f9 Update riscv-gnu-toolchain to cb6b34b 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-06-29 22:35:22 +02:00
Clifford Wolf 4fed27fc16 Fix showtrace.py for changed objdump output format 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-25 21:13:14 +02:00
Clifford Wolf 1cc9784d71 Fix "make testbench_verilator" bug 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-25 21:04:30 +02:00
Clifford Wolf 3f55fb4ccb Improve testbench_verilator 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-25 13:04:49 +02:00
Clifford Wolf 247a19dd58 Add "make test_verilator" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-05-25 12:53:21 +02:00
Clifford Wolf 147da6432a
Merge pull request #69 from olofk/picosoc_regs_v3 
Bypass picosoc compile order check if PICORV32_REGS is defined.
 2018-05-19 12:09:52 +02:00
Olof Kindgren 2ceb472178 Bypass picosoc compile order check if PICORV32_REGS is defined. 
Previously, picosoc.v needed to be sourced before picorv32.v to
ensure that the PICORV32_REGS `define (used to select implementation
for the register file) was set to picosoc_regs

This allows for overriding PICORV32_REGS, e.g. by setting it
externally in the EDA tool invocation. In this case, the compile
order between picorv32.v and picosoc.v is not important.

Note: This change will break the safety check if PICORV32_REGS
is defined between sourcing picorv32.v and picosoc.v
 2018-05-18 23:52:31 +02:00