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picorv32
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607 Commits

Author SHA1 Message Date
KrystalDelusion 336cfca6e5
Merge pull request #244 from MichaelBell/fix-rv32e 
Fix RV32E shifts by immediates >= 0x10
 2024-03-27 07:19:49 +13:00
Mike Bell de92ce54e8
Fix RV32E shifts 2024-03-27 05:52:56 +13:00
KrystalDelusion b91af1c87e
Merge pull request #218 from retrhelo/master 
firmware: fix unaligned symbol problem
 2024-03-27 05:48:58 +13:00
KrystalDelusion 36b16f75ec
Merge pull request #248 from Flinner/patch-1 
rename variable `CCFLAGS` to `CFLAGS`
 2024-03-27 05:43:07 +13:00
matt venn ccbb141be8
Update README.md to include status badge 2024-03-26 17:38:12 +01:00
KrystalDelusion 9690f5acef
Merge pull request #253 from KrystalDelusion/ci 
Adding ci.yml
 2024-03-27 05:35:20 +13:00
Krystine Sherwin 640c4e01fc
ci: Remove oss-test 2024-03-16 15:41:03 +13:00
Krystine Sherwin 4d33229786
ci: Add riscv-formal job 
Checkout YosysHQ/riscv-formal and run `make checks` for picorv32.
 2024-03-16 15:41:03 +13:00
Krystine Sherwin 6881fa5158
ci: Initial commit 
Dummy test of YosysHQ/setup-oss-cad-suite@v3
 2024-03-16 15:39:40 +13:00
matt venn a7b56fc81f
Merge pull request #252 from projf/clarify-use-of-enable-pcpi 
Clarify use of ENABLE_PCPI
 2024-03-06 19:00:57 +01:00
Will Green 92c1360181
Clarify use of ENABLE_PCPI. 
* ENABLE_PCPI is only needed for external co-processors.
* Correct spelling of demonstration.
 2024-03-06 17:50:12 +00:00
Flinner fc6d5d14e0
rename variable `CCFLAGS` to `CFLAGS` 
`CCFLAGS` doesn't exist in my Make version as far as I'm aware.
 2023-11-21 07:35:05 +03:00
Claire Xen c0acaebf0d
Merge pull request #229 from flaviens/fence 
Bugfix: decode fence instruction
 2023-11-16 16:38:19 +01:00
Flavien Solt 29102c00a8 Bugfix: decode fence instruction 2023-02-22 09:16:09 +01:00
retrhelo 6399aeaa59 firmware: fix unaligned symbol problem 2022-05-12 16:32:58 +08:00
Claire Xen f00a88c36e
Merge pull request #209 from YosysHQ/micko/cleanups 
Cleanups
 2022-01-03 16:03:13 +01:00
Miodrag Milanovic e8dbd9ac6a Fix dhrystone 2021-12-27 11:09:39 +01:00
Miodrag Milanovic d330c1406b fix for check target 2021-12-27 10:52:12 +01:00
Miodrag Milanovic b08952b896 Fix gitignore 2021-12-27 10:18:51 +01:00
Miodrag Milanovic 0b87954437 Fix simulation 2021-12-27 10:18:30 +01:00
Claire Xen 1d9f5b7678
Merge pull request #166 from tommythorn/master 
Enable the use of 64-bit riscv tools
 2021-12-06 16:10:29 +01:00
Claire Xen 6b1397700f
Merge pull request #173 from tonymmm1/hx8kdemo-nextpnr 
changed hx8kdemo from arachne-pnr to nextpnr-ice40
 2021-12-06 16:09:28 +01:00
Claire Xen 354f65ab4a
Merge pull request #202 from osresearch/icebreaker-fast-mul 
picosoc: enable fast multiply option for icebreaker
 2021-12-06 16:09:00 +01:00
Miodrag Milanovic e8edf98772 add license file 2021-12-03 15:54:08 +01:00
Claire Xenia Wolf 100e421be0 Fix copyright info 
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
 2021-12-02 15:59:12 +01:00
Trammell Hudson eeca10190b picosoc: enable fast multiply option for icebreaker 
This patch splits the picosoc's `ENABLE_MULDIV` paramter
into `ENABLE_MUL`, `ENABLE_DIV` and `ENABLE_FAST_MUL`,
and also enables the DSP-based fast multiplier for
the iCE40up5k icebreaker board.

Signed-off-by: Trammell Hudson <hudson@trmm.net>
 2021-09-02 16:35:38 +00:00
tonymmm1 8588576692 changed hx8kdemo from arachne-pnr to nextpnr-ice40 2020-08-09 20:58:19 -05:00
Tommy Thorn 2cce6f4e8b Enable the use of 64-bit riscv tools 
Many Linux distributions now include the tools for RISC-V (for example
Ubuntu 20.04 has gcc-riscv64-unknown-elf) but in order for

  make TOOLCHAIN_PREFIX=riscv64-unknown-elf-

to work we need to be explicit about compiling for 32-bit.
 2020-06-03 09:27:30 -07:00
Larry Doolittle f9b1beb4cf Make Makefile more flexible 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-04-27 17:23:45 +02:00
Larry Doolittle 59ef49564f Remove obsolete line from firmware/sections.lds 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-04-23 18:01:24 +02:00
Larry Doolittle 25c58766c3 Disable RVC in tests/jal.S and tests/jalr.S 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-04-23 18:00:51 +02:00
Larry Doolittle e03c43ea43 Add plusargs support to testbench.cc 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-04-23 18:00:16 +02:00
Larry Doolittle 9129d18bf5 Cleanup whitespaces 
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
 2020-04-23 17:59:17 +02:00
Claire Wolf 409d0dfd67
Merge pull request #145 from Novakov/patch-1 
spimemio documentation: read latency reset value
 2020-04-22 17:32:19 +02:00
Claire Wolf fe1ee2c739
Merge pull request #152 from RolinBert/master 
Fix #151 (missing irqs)
 2020-04-22 17:31:29 +02:00
Claire Wolf 65e72ea49e
Merge pull request #156 from dehann/patch-1 
fix readme icebreaker links
 2020-04-22 17:25:28 +02:00
Claire Wolf fb34c8aca9
Merge pull request #148 from splinedrive/disable_memory_test 
Workarround: Disable cmd_memtest() when starting firmware.
 2020-04-22 17:25:05 +02:00
Claire Wolf 824a5c8011
Merge pull request #158 from rxrbln/uart 
added default clk divider parameter to simpleuart
 2020-04-15 18:49:23 +02:00
René Rebe a7ff70dfb4 added default clk divider parameter to simpleuart 2020-04-15 13:25:57 +02:00
dehann b428e843cd
fix icebreaker links 2020-04-12 14:42:45 -04:00
Robert Korn fac01cee1c - fix missing brackets 2020-03-30 19:00:28 +02:00
Robert Korn 258d63d476 - fix missed timer interrupts, 
when another interrupt activates shortly before
 2020-03-27 07:26:48 +01:00
Hirosh Dabui 1b6821d1a1 Workarround: Disable cmd_memtest() when starting firmware. 
It destroys bss and data section memory.
You are not able to use static or global vars.
 2020-01-27 02:19:56 +01:00
Maciej T. Nowak 0201e8ff02
spimemio documentation: read latency reset value 
According to c06ba38113/picosoc/spimemio.v (L111) the reset value for `Read latency (dummy) cycles` is 8 cycles, not 0.
 2020-01-03 21:57:19 +01:00
Clifford Wolf e308982e18
Merge pull request #141 from rxrbln/master 
added CROSS prefix and CFLAGS to the picsoc/Makefile
 2019-11-18 14:21:10 +01:00
René Rebe 1e24e99970 added CROSS prefix and CFLAGS to the picsoc/Makefile 
so one can run it with other toolchains, e.g.
CROSS=riscv64-t2-linux-gnu- CFLAGS=-mabi=ilp32, too
 2019-11-14 12:31:20 +01:00
Clifford Wolf 46aa89c13f
Merge pull request #138 from pcotret/patch-1 
Short modification in the error string
 2019-10-31 11:25:37 +01:00
Pascal Cotret 415382761c
Short modification in the error string 2019-10-29 16:42:24 +01:00
Clifford Wolf 77277a0d32 Fix typo, closes #136 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-25 11:28:08 +02:00
Clifford Wolf 3f9b5048bc Fix initialization of "irq" in verilog testbench 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-09-22 13:59:43 +02:00