Florent Kermarrec
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b24943e691
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bench/genesys2: add litescope on ddrphy.dfi.
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2020-10-08 16:21:02 +02:00 |
Florent Kermarrec
|
06544c6547
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bench: uniformize targets with 125MHz clock and Etherbone.
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2020-09-24 13:03:07 +02:00 |
Florent Kermarrec
|
6fc6174c38
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bench/genesys2: expose uart parameter.
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2020-09-17 08:22:17 +02:00 |
Florent Kermarrec
|
6a5f2fdb09
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bench/genesys2: add uart_name parameter.
Useful when Etherbone is just used to reload BIOS.
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2020-09-14 18:43:33 +02:00 |
Florent Kermarrec
|
020cff1970
|
bench/genesys2: add back Etherbone (faster for BIOS dev) and add --load-bios/set-sys_clk arguments.
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2020-09-14 10:55:16 +02:00 |
Florent Kermarrec
|
7eeea34c4e
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bench: use 115200bauds UART on all targets (fast enough and simplify switch betwen targets).
|
2020-09-14 10:05:55 +02:00 |
Florent Kermarrec
|
7d0dac78c5
|
bench/kcu105: add a second pll to reduce frequency steps.
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2020-08-28 19:03:44 +02:00 |
Florent Kermarrec
|
1fb78fa558
|
bench: cleanup, do more testing on 7-series.
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2020-08-28 17:57:59 +02:00 |
Florent Kermarrec
|
248c5de517
|
bench: switch to UARTBone to simplify (and to allow testing boards without ethernet capability) and improve test.
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2020-08-28 03:47:49 +02:00 |
Florent Kermarrec
|
d3502e6a9b
|
bench: add common.py with common bench test code.
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2020-08-27 19:05:05 +02:00 |
Florent Kermarrec
|
2e3e19e9d4
|
bench: simplify/improve, working on arty/genesys2.
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2020-08-27 18:41:54 +02:00 |
Florent Kermarrec
|
9995c0fefb
|
bench: switch integrated_rom to "rw" mode and reload it over Etherbone at startup.
This simplifies software development.
|
2020-08-24 18:40:54 +02:00 |
Florent Kermarrec
|
ac825e5112
|
add SPDX License identifier to header and specify file is part of LiteDRAM.
|
2020-08-23 15:52:08 +02:00 |
Florent Kermarrec
|
94241d0583
|
bench: use new platform.request_all on LedChaser.
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2020-08-06 20:03:03 +02:00 |
Florent Kermarrec
|
74205979bd
|
bench: add genesys2 bench.
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2020-08-06 19:19:45 +02:00 |