Florent Kermarrec
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ac825e5112
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add SPDX License identifier to header and specify file is part of LiteDRAM.
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2020-08-23 15:52:08 +02:00 |
Jędrzej Boczar
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22bd01c014
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frontend/wishbone: simplify by reusing LiteDRAMNativePortConverter
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2020-05-13 17:14:42 +02:00 |
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Jędrzej Boczar
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1587ee3611
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frontend/adaptation: use port.cmd.last instead of port.flush in up-converter
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2020-05-11 15:28:32 +02:00 |
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Jędrzej Boczar
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9b90a56e07
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frontend/adaptation: combine read/write port up-converters and extend tests
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2020-05-11 14:56:39 +02:00 |
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Jędrzej Boczar
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7a0f7a7ead
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test/common: fix error in test data
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2020-05-11 14:56:39 +02:00 |
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Jędrzej Boczar
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1cc9656a2d
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test/crossbar: improve NativePortDriver to use separate generatos on data paths
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2020-05-11 14:25:06 +02:00 |
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Florent Kermarrec
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966ebcbc41
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test: cleanup/uniformize things between tests.
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2020-04-13 19:38:29 +02:00 |
Jędrzej Boczar
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8a0bcb3a2a
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test: add core.crossbar tests
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2020-04-10 12:46:10 +02:00 |
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Jędrzej Boczar
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00fcdf6da7
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test: split core.multiplexer tests into separate files
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2020-04-01 15:36:14 +02:00 |
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Jędrzej Boczar
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1f8868e6e9
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test: add frontend.adaptation tests for different conversion ratios
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2020-03-24 11:12:11 +01:00 |
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Jędrzej Boczar
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f19d92b67f
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test: add wishbone tests with data width mismatch
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2020-03-20 14:48:50 +01:00 |
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Jędrzej Boczar
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3c0fdf0710
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test: handle 'we' in DRAMMemory, add memory debug messages
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2020-03-20 14:48:39 +01:00 |
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Jędrzej Boczar
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03f93998b5
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test: move DMA specific tests to test_dma.py
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2020-03-19 09:13:28 +01:00 |
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Florent Kermarrec
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9584c2fe88
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test: remove use of rand_wait, rename rand_level to random
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2019-07-23 21:14:17 +02:00 |
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Florent Kermarrec
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f018c9e268
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add CONTRIBUTORS file and add copyright header to all files.
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2019-06-23 23:59:10 +02:00 |
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Florent Kermarrec
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429d3a89de
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test/common: set rdata_valid_rand_level default value to 0
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2019-01-21 16:54:23 +01:00 |
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Florent Kermarrec
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7ef4869db9
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test/test_axi: also add randomness on rdata.valid and wdata.ready
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2018-11-30 11:22:04 +01:00 |
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Florent Kermarrec
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1fa73e4718
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test: update
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2018-09-06 11:10:45 +02:00 |
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Florent Kermarrec
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95cb7cdba5
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test: rename read/write generators to handlers
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2018-08-28 13:40:50 +02:00 |
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Florent Kermarrec
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10229d1e7d
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test/test_axi: improve test_axi2native
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2018-08-28 13:39:11 +02:00 |
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Florent Kermarrec
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6a46ea3052
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test/test_bist: add generator test, remove async test
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2018-08-28 11:50:11 +02:00 |
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Florent Kermarrec
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697f46a97f
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replace litex.gen imports with migen imports
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2018-02-23 13:39:23 +01:00 |
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Florent Kermarrec
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99550968e7
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test: move BISTDriver to common and use it in test_bist_async
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2017-01-17 15:18:10 +01:00 |
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Florent Kermarrec
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c56f90e865
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test/test_bist: simplify and test modules directly not through CSR
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2017-01-17 14:14:50 +01:00 |
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Florent Kermarrec
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aac61f346e
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test: start fixing bist_tb
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2016-12-17 19:24:12 +01:00 |
Tim 'mithro' Ansell
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e21b45b608
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Merge remote-tracking branch 'upstream/master' into bist
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2016-12-17 18:15:59 +01:00 |
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Tim 'mithro' Ansell
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f1ad8991a4
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bist: Working on improving the names of things.
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2016-12-17 14:09:50 +01:00 |
|
Tim 'mithro' Ansell
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8ff2f8779b
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bist: Adding "halt on error" functionality.
Also include ability to see address of error and expected verse actual
data values.
Extend the test bench to test this functionality.
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2016-12-17 14:09:50 +01:00 |
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Tim 'mithro' Ansell
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da144f41d4
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bist: Refactoring test bench.
Move a bunch of common code into common.py
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2016-12-17 14:09:50 +01:00 |
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Florent Kermarrec
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e2b6bda7d0
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test: add random and autocheck on downconverter_tb and upconverter_tb
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2016-06-08 17:33:21 +02:00 |
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Florent Kermarrec
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3fe3a843e0
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test: also test reads on downconverter/upconverter
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2016-05-24 21:40:46 +02:00 |
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Florent Kermarrec
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de61cefb58
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test: add downconverter_tb and some fixes
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2016-05-24 20:48:26 +02:00 |
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Florent Kermarrec
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f36c65b66f
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test: move DRAMMemory model to common
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2016-05-23 13:30:38 +02:00 |
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Florent Kermarrec
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d7458a3c34
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test: remove common
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2016-05-04 01:16:29 +02:00 |
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Florent Kermarrec
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7732ff27a6
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update code, start bankmachine refactoring and remove old code (will be rewritten)
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2015-09-15 10:22:39 +02:00 |