16 commits

Author	SHA1	Message	Date
Florent Kermarrec	b870d13d96	global: reset_less optimizations	2017-07-01 11:22:26 +02:00
Florent Kermarrec	657ba4cb16	global: use valid/ready/last signals instead of stb/ack/eop (similar to AXI)	2016-03-16 21:36:07 +01:00
Florent Kermarrec	aff07c6809	global: use new StrideConverter	2016-03-16 17:01:13 +01:00
Florent Kermarrec	51f56e79dd	global: remove use of sop	2016-03-16 16:22:00 +01:00
Florent Kermarrec	32243934fb	global: use stream.Endpoint instead of Sink/Source (deprecated)	2016-03-15 16:50:00 +01:00
Florent Kermarrec	d38612db0c	remove use of Record.connect	2015-12-27 12:26:01 +01:00
Florent Kermarrec	1f19518d63	phy/common: add LiteEthPHYHWReset and use it on phys	2015-12-09 16:57:02 +01:00
Florent Kermarrec	54d7c6620b	phy: add mdio on all phys	2015-12-09 16:42:35 +01:00
Florent Kermarrec	ad0b4a165f	phy: rmii refactor (tested)	2015-12-07 15:46:15 +01:00
Florent Kermarrec	6006186fe0	phy/rmii: use 50MHz (instead of 100Mhz) and use DDROutput to generate ref_clk	2015-12-03 23:47:08 +01:00
Florent Kermarrec	6b39b0f674	phy: fix clock domains renaming (ClockDomainsRenamer refactoring issue)	2015-11-30 13:04:47 +01:00
Florent Kermarrec	449d84bf11	remove Counter module	2015-11-24 21:02:07 +01:00
Florent Kermarrec	9a7039ef72	use mininal imports	2015-11-24 20:44:00 +01:00
Florent Kermarrec	09dad1b520	phy/rmii: adapt to new syntax and fixes	2015-11-19 15:42:51 +01:00
Florent Kermarrec	2b6dfa6a7e	cleanup (remove use of FlipFlop)	2015-10-24 13:28:09 +02:00
Florent Kermarrec	7321e87cbb	phy: add RMII phy (not yet tested) assuming 100MHz cd_eth ClockDomain provided externally	2015-10-15 21:20:55 +02:00