Florent Kermarrec
75f7120ff9
targets/Ultrascale: Fix build since idelay's reset is now handled by the PLL (with_reset=True).
2021-03-11 10:00:06 +01:00
Florent Kermarrec
21207533b0
targets/Ultrascale(+): Generate Reset to idelay clock domain (to be sure to follow UG571 reset sequence).
2021-03-04 19:49:03 +01:00
Gary Wong
99e2f04ee5
Be friendlier about incompatible options.
...
Collect --with-ethernet/--with-etherbone, --with-spi-sdcard/--with-sdcard,
etc. into ArgumentParser.add_mutually_exclusive_group()s. That way, we
get pretty --help output, and appropriate error messages if somebody
tries to ask for something that doesn't make sense.
2021-01-29 18:08:38 -07:00
Hans Baier
0ee62dd681
add etherbone ip address option for relevant boards
2021-01-08 18:44:31 +01:00
Florent Kermarrec
d73bd2f7ce
targets/xilinx: add comment on sys_clk to pll.clkin false path.
2021-01-07 08:01:54 +01:00
Florent Kermarrec
1ac1c6857f
targets/xilinx: add false path constraint between sys_clk and pll.clkin.
...
The SoC reset added recently creates a path between sys_clk and pll.clkin
clock domains that is reported by the tools but that can be safely ignored.
2021-01-07 00:02:46 +01:00
Florent Kermarrec
778ce53865
targets/xcu1525: add SATA.
2020-11-17 15:27:42 +01:00
Florent Kermarrec
27e19644f4
targets/kcu105: add SATA.
2020-11-16 18:44:18 +01:00
Florent Kermarrec
d42af3ea19
targets: add --sys-clk-freq support to all targets.
2020-11-12 18:07:28 +01:00
Florent Kermarrec
843e724e3d
targets/pcie: simplify using new LiteX's add_pcie method and enable it on all devices supported by LitePCIe.
2020-11-12 16:39:42 +01:00
Florent Kermarrec
39d979a9d3
targets/Ultrascale: add missing AsyncResetSynchronizer import.
2020-11-09 10:25:05 +01:00
Florent Kermarrec
2b17dc1b89
target: add rst signal to CRG to allow full reset of the SoC on reboot command.
2020-11-04 11:13:42 +01:00
Florent Kermarrec
814e7630e4
targets/xilinx: use generic name for idelay clk (avoid clk200, clk400, etc...) since we somtimes want to change it.
2020-10-13 12:10:29 +02:00
Florent Kermarrec
c3ea04b6e9
targets/s7/us: update sdram (manual cmd_latency no longer needed).
2020-10-12 18:46:21 +02:00
Florent Kermarrec
cc53206aff
targets/kcu105: create specific cd_eth for ethphy.
2020-09-24 10:25:55 +02:00
Florent Kermarrec
5b7288cfee
targets/kcu105: add Etherbone support.
2020-09-24 09:55:11 +02:00
Florent Kermarrec
1781be166a
general: add SPDX License identifier to header and specify files are part of LiteX-Boards.
2020-08-23 15:00:17 +02:00
Florent Kermarrec
869ceadacb
targets: use platform.request_all on LedChaser.
2020-08-06 20:04:03 +02:00
Florent Kermarrec
7a48a61605
targets: add indentifier on all targets.
2020-06-30 18:11:04 +02:00
Florent Kermarrec
eeba64d7b2
targets: use soc.build_name in load/flash bitstream.
2020-05-21 09:12:29 +02:00
Florent Kermarrec
6f22f082ff
targets: add LedChaser on platforms with user_leds.
...
Default to Chaser mode and similar user interface than GPIOOut.
2020-05-08 22:16:13 +02:00
Florent Kermarrec
da61aabc5b
targets: remove USDDRPHY_DEBUG and set cmd_latency to on all Kintex7/Ultrascale targets.
2020-05-05 16:32:10 +02:00
Florent Kermarrec
2d9543b65e
targets: add build/load parameters on all targets.
2020-05-05 15:11:47 +02:00
Florent Kermarrec
2213d73b89
targets/kcu105: use cmd_latency=1.
2020-04-25 12:13:49 +02:00
Florent Kermarrec
4185a019f5
targets: manual define of the SDRAM PHY is no longer needed.
2020-04-16 11:25:59 +02:00
Florent Kermarrec
3b91e96c42
targets/add_constant: avoid specifying value when value is None (=default)
2020-03-26 09:47:22 +01:00
Florent Kermarrec
555bf6c4dc
targets/Ultrascale(+): enable USDDRPHY_DEBUG.
2020-03-26 09:17:09 +01:00
Florent Kermarrec
3fb3ba18e8
targets: switch to add_ethernet method instead of EthernetSoC.
2020-03-21 18:29:52 +01:00
Florent Kermarrec
83e6fb29f8
targets: switch to SoCCore/add_sdram instead of SoCSDRAM.
2020-03-21 12:43:39 +01:00
Florent Kermarrec
e2a66090ee
targets/Ultrascale(+): simplify CRG using USIDELAYCTRL.
2020-03-10 16:55:22 +01:00
Florent Kermarrec
4edf196911
targets/EthernetSoC: be sure memory region is added before adding Wishbone Slave (required by new SoC)
2020-02-11 17:45:35 +01:00
Florent Kermarrec
8211aca2e8
Avoid Official/Partner/Community differentiation: use same directory for all platforms/targets.
...
We initially wanted to provide different level of support for the platforms/targets, mainly
to avoid too much maintenance and let each contributor update its contributed platforms and
targets, but it's easier to update all platforms/targets all-together when LiteX evolves or
changes (and that's what has been done on litex-boards since the creation of the repository).
So let just simplify things and avoid this differentiation.
2020-02-03 09:36:30 +01:00