Commit Graph

73 Commits

Author SHA1 Message Date
inc 399f10fdf9 add support for Mozart MX2 2024-10-05 08:16:18 +02:00
Gustav 2d3a6b81e6
Add support for NetFPGA-Sume (#604) 2024-09-18 11:21:51 +02:00
Gwenhael Goavec-Merou 8579af5710 lattice_certuspro_nx_vvml: new board support 2024-06-28 12:47:57 +02:00
Gwenhael Goavec-Merou f27bbc9645 lattice_certuspro_nx_evn: new board support 2024-06-28 12:47:16 +02:00
inc a1df389c7e machdyne: switch to LiteXArgumentParser; add mozart ml2+mx1 and vivaldi ml1 2024-06-22 11:26:43 +02:00
inc 5d62eec8a8 README.md: add vanille and lakritz 2024-06-22 09:32:15 +02:00
Florent Kermarrec a8d31510a4 README.md: Bump year. 2024-06-11 18:58:16 +02:00
Florent Kermarrec ffca906b34 README.md: Add hseda_xc7a35t. 2024-06-11 18:51:48 +02:00
Joshinken 61d81951b2
Update README.md
fixed typo
2024-05-28 11:05:12 +02:00
Florent Kermarrec 40c7a63e53 Finish tang_mega_138k renaming to tang_mega_138k_pro. 2024-03-26 21:58:02 +01:00
Gwenhael Goavec-Merou 6b35c47e8b xilinx_zc706: new Xilinx/AMD Zynq7000 based board 2024-03-26 20:49:54 +01:00
Gwenhael Goavec-Merou 214b1505a6 README: Adding colognechip GateMate EVB 2024-03-02 12:23:41 +01:00
Gwenhael Goavec-Merou e1e989acac Olimex GateMate A1 EVB: new Board 2024-03-02 12:23:27 +01:00
Ruurd Keizer 4d967e8387 add to boards list 2024-02-01 16:18:26 +01:00
inc fd59d954ba add support for minze board 2023-12-29 06:01:59 +01:00
inc 754b6d2427 add support for mozart ml1 2023-12-19 22:18:21 +01:00
Florent Kermarrec 8e3dc21ce5 aliexpress_xc7k70t: Review/Cleanup.
- Cosmetic cleanups in platform.
- Add clk50 constraint.
- Remove JTAGBone specific support since now directly handled by LiteX.
2023-11-09 08:26:06 +01:00
Florent Kermarrec 5723832e15 README: Add sipeed_tang_primer_25k to board list. 2023-10-17 11:50:46 +02:00
Florent Kermarrec 5be6a46cfe README.md: Add sipeed_tang_mega_138k to supported boards. 2023-09-26 10:36:04 +02:00
Florent Kermarrec c14d66cb6b analog_pocket: Add Serial (to fix CI) and add to board list. 2023-09-21 10:11:55 +02:00
Mark1626 e9335cd67a
Fix pins in Alchitry Cu platform, add target for Alchitry Cu 2023-06-27 21:35:55 +05:30
Florent Kermarrec 3308b6ddf3 README.md: Update boards. 2023-03-22 10:53:02 +01:00
Florent Kermarrec 8a6f0bd94f opalkelly_xem8320: Review and update to recent LiteX changes. 2023-03-01 09:16:51 +01:00
inc bd20b31a5c add support for machdyne kopflos board 2023-02-21 11:18:22 +01:00
Florent Kermarrec 549905bc38 README: Bump year. 2023-02-16 09:08:38 +01:00
Florent Kermarrec 456548afab README: Update boards list. 2023-02-16 09:07:50 +01:00
Florent Kermarrec a0fd3e7536 Add initial OCP-TAP TimeCard support with PCIe/SPIFlash/Leds/Buttons/DNA/XADC (Compiles but untested). 2023-01-12 18:50:23 +01:00
inc f0dc9a6874 initial support for machdyne konfekt and noir 2022-12-30 17:00:35 +01:00
Florent Kermarrec f1899954e9 Add initial NewAE CW305 board support. 2022-09-13 12:38:30 +02:00
Florent Kermarrec fdd16b796f README: Update boards list. 2022-08-24 15:26:34 +02:00
AEW2015 313e758ffe Updated copywrite and renamed to avnet_aesku40 2022-06-03 20:49:52 -06:00
Florent Kermarrec 45494f60e0 targets: Change SoC/Software headers generation behaviour (Now only generated with --build).
Re-generating the SoC/Software headers was causing some un-expected behaviours for users not familiar
with the flow. For example doing a --load with a different configuration, was re-generating the Software
headers and messing up things when trying to run software on the SoC.
2022-05-06 15:14:32 +02:00
Florent Kermarrec 0ce7f8354c Add initial LimeSDR Mini V2 support (With SoC + USB3 (FT245PHYSynchronous)).
python3 -m litex_boards.targets.limesdr_mini_v2 --csr-csv=csr.csv --build --load
litex_server --jtag --jtag-config=openocd_limesdr_mini_v2.cfg
litex_term crossover

        __   _ __      _  __
       / /  (_) /____ | |/_/
      / /__/ / __/ -_)>  <
     /____/_/\__/\__/_/|_|
   Build your hardware, easily!

 (c) Copyright 2012-2022 Enjoy-Digital
 (c) Copyright 2007-2015 M-Labs

 BIOS built on May  3 2022 18:59:46
 BIOS CRC passed (5f29afcc)

 LiteX git sha1: a4cc859d

--=============== SoC ==================--
CPU:		VexRiscv @ 80MHz
BUS:		WISHBONE 32-bit @ 4GiB
CSR:		32-bit data
ROM:		128KiB
SRAM:		8KiB


--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found

--============= Console ================--

litex> ident
Ident: LiteX SoC on LimeSDR-Mini-V2 2022-05-03 18:59:29
2022-05-03 19:04:06 +02:00
Florent Kermarrec 14f4500653 README: Update boards list. 2022-04-21 10:39:54 +02:00
enjoy-digital 8c51cb12c8
Merge pull request #383 from sysmanalex/master
Added Kintex-7 xc7k420t xc7k420tiffg901-2L named as u420t board
2022-04-21 10:02:05 +02:00
Florent Kermarrec 5aab6f01b6 README: Update boards list. 2022-04-14 12:30:19 +02:00
Alex Petrov 1e00a43fdd board u420t kintex update v0.2 2022-04-13 00:12:59 +03:00
John Simons b8b0aead28 Added basic support for Arduino MKR Vidor 4000 2022-03-21 18:54:29 -07:00
Florent Kermarrec e5fd58f1af README: Add adi_adrv2crr_fmc. 2022-03-07 09:26:24 +01:00
Florent Kermarrec ddd040bc42 README: Switch to python3 -m litex_boards.targets.<board> and remove .py in boards list. 2022-03-01 14:08:34 +01:00
Florent Kermarrec 89a80e713e README: Update boards picture with reduced jpg version. 2022-03-01 14:03:00 +01:00
Florent Kermarrec 1ce0a4b070 README: Update and simplify boards listing. 2022-03-01 11:57:32 +01:00
Sergiu Mosanu 5a0f69502b enable use of HBM for linux boot 2022-02-08 12:18:38 -05:00
Florent Kermarrec d9303e096b Bump year. 2022-01-05 09:09:16 +01:00
alainlou 1b676f929a cleanup and ease of use
- update README
- delete some unnecessary toolchain commands (copied from trenz boards)
- use minimal cpu_variant by default when vexriscv is selected
2021-10-03 13:21:45 -04:00
Benjamin Herrenschmidt 4a52996106 Wukong board improvements
This adds support for v2 of the board via a --board-version argument
and a way to select the FPGA speed grade via a --speed-grade argument.

Note that the speed grade now defaults to -1. QMTech confirmed that
V1 of the board were made in two batches, one with -1 and one with -2,
while V2 of the board is all -1. So -1 is the safer default.

This also fixes the inversion of j10 and j11 and a typo in the pin
definition of jp3

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2021-09-24 12:13:56 +10:00
Alain Lou 610e82d774
Add initial RZ-EasyFPGA support! (#270) 2021-09-21 09:55:22 +02:00
Kamyar Mohajerani b75af2f21c
Update README.md
FPGA on "Zybo Z7" is a 7-Series Zynq not a Zynq Ultrascale+
2021-09-15 10:21:10 -04:00
Dhiru Kholia 781d83bab6 Add support for EBAZ4205 'Development' Board
Usage:

```
./ebaz4205.py --cpu-type=vexriscv --build --load
```

```
$ pwd
litex-boards/litex_boards/targets
```

Tip: Use `GTKTerm` to connect to /dev/ttyUSB0 (usually) and interact
with the LiteX BIOS.

References:

- https://github.com/fusesoc/blinky#ebaz4205-development-board
- https://github.com/olofk/serv/#ebaz4205-development-board
- https://github.com/xjtuecho/EBAZ4205#ebaz4205
- https://github.com/nmigen/nmigen-boards/pull/180 (merged)
- https://github.com/olofk/corescore/pull/33
- The existing 'Zybo Z7' example

Note: The `PS7` stuff remains untested via LiteX for now.
2021-08-31 18:54:49 +02:00
alainlou 126c98488a update IRC channel 2021-08-16 14:18:08 -04:00