Sergiu Mosanu
84656a9c2e
re-compare and adjust to u250
2021-01-26 23:03:09 -05:00
Sergiu Mosanu
7a738245af
fix bitstream problem
2021-01-14 21:53:25 -05:00
Sergiu Mosanu
5a73eb0b6d
initiate target and platform for alveo_u280 board
2021-01-14 18:35:43 -05:00
Florent Kermarrec
6a5f2f59a6
targets/orangecrab: use new ECP5DDRPHY's cmd_delay to add extra delay on DDR3's Clock/Commands.
...
This fixes https://github.com/enjoy-digital/litedram/issues/130 and has been tested
at 48/64/96MHz on MT41K64M16 and MT41K512M16 variants.
Also remove un-needed cd_sys2x_eb.
2021-01-12 18:57:22 +01:00
Florent Kermarrec
9ff90eb9fe
targets/c10lprefkit: fix default sys-clk-freq.
2021-01-12 16:15:52 +01:00
Florent Kermarrec
0a7443d273
targets/orangecrab: make usr_btn optional to fix compilation with revision 0.1.
2021-01-08 19:30:37 +01:00
Florent Kermarrec
ae5494d7b6
orangecrab: defaults to USB-ACM UART.
2021-01-08 19:01:41 +01:00
Florent Kermarrec
c6e75122d9
sds1104xe: defaults to Crossover UART.
2021-01-08 19:00:41 +01:00
Florent Kermarrec
ab72f69937
targets/ac701: rename --ethernet-phy to --eth-phy for consistency with others targets.
2021-01-08 18:50:01 +01:00
Hans Baier
0ee62dd681
add etherbone ip address option for relevant boards
2021-01-08 18:44:31 +01:00
Florent Kermarrec
869cce2bba
targets/colorlight_5a_75x: rename etherbone-ip args to eth-ip.
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eth-ip will also be used to configure Ethernet IP addresss.
2021-01-07 09:26:38 +01:00
Florent Kermarrec
c829a47c31
targets/colorlight_5a_75x: Automatically disable Led Chaser when serial is used.
2021-01-07 09:17:28 +01:00
enjoy-digital
adbcc81ecf
Merge pull request #145 from hansfbaier/master
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colorlight: Add option for etherbone ip address and LED chaser
2021-01-07 09:08:43 +01:00
enjoy-digital
a6e867c691
Merge pull request #144 from gsomlo/gls-genesys2-sdcard
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genesys2: LiteSDCard support
2021-01-07 08:12:24 +01:00
Florent Kermarrec
d73bd2f7ce
targets/xilinx: add comment on sys_clk to pll.clkin false path.
2021-01-07 08:01:54 +01:00
Florent Kermarrec
1ac1c6857f
targets/xilinx: add false path constraint between sys_clk and pll.clkin.
...
The SoC reset added recently creates a path between sys_clk and pll.clkin
clock domains that is reported by the tools but that can be safely ignored.
2021-01-07 00:02:46 +01:00
Hans Baier
0d69cfa6b0
colorlight: make LEDs optional
2021-01-05 08:03:26 +07:00
Hans Baier
4bec17e1a7
colorlight: Add option for etherbone ip address
2021-01-05 07:49:44 +07:00
Gabriel Somlo
2589d9f704
genesys2: add (spi-)sdcard build options
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Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
2021-01-04 13:57:21 -05:00
Florent Kermarrec
fe67766fb7
targets/gensdrphy/halfsdrphy: pass new optional sys_clk_freq (used to compute cl).
2021-01-04 11:38:07 +01:00
Florent Kermarrec
0e3c03f2f6
mercury_xu5: remove unneeded cmd_latency=0 (now defaulting to 0).
2021-01-04 10:48:34 +01:00
Florent Kermarrec
5cc49bafbd
orangecrab: Run reset_timer with por/48MHz clock domain (sys clock domain is now directly reseted on usr_btn press).
2021-01-04 09:42:05 +01:00
Florent Kermarrec
1fb24d4c71
orangecrab: Avoid usb clock domain reset on usr_btn press or SoC reset.
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Allows the USB-ACM link to stay up during reset.
2021-01-04 09:05:19 +01:00
Florent Kermarrec
06cb49af37
targets/arty: add variant support through --variant args.
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./arty.py --variant=a7-35 or a7-100
./arty_s7.py --variant=s7-50 or s7-25
2020-12-29 18:43:14 +01:00
Florent Kermarrec
02a81d54e2
targets/ecpix5/eth: set rx_delay to 0ns (tested with netboot on R01).
2020-12-29 16:01:12 +01:00
Florent Kermarrec
84098d2de5
targets/qmtech_wukong: submitted target was the platform file, update with target shared in #133 .
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Build tested with /qmtech_wukong.py --with-sdcard --with-ethernet --integrated-rom-size=0x10000 --build.
2020-12-29 14:13:11 +01:00
Florent Kermarrec
e380f24655
targets/qmtech_wukong: +x.
2020-12-29 13:24:41 +01:00
Shinken Sanada
4b721eded7
add QmTech Wukong board support.
2020-12-29 13:20:42 +01:00
Florent Kermarrec
9beaf25822
nexys4ddr: fix eth/int_n pin (B8) and use 4-bit on vga.blue.
2020-12-24 10:15:29 +01:00
Sahaj Sarup
2a04c5c74e
nexys4ddr: add support for litexvideo VGA Terminal
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This commit adds VGA support for the Nexys A7/ Nexys 4 DDR.
The VGA is however limited to RGB443 instead of the full 12bit RGB444.
This is because IO D8 which is MSB for Blue, is also used for ETH int_n.
This makes the final output have a yellow tint.
2020-12-23 02:24:18 +05:30
Vadim Kaushan
f6a106cdf4
Fix orangecrab target
2020-12-20 01:07:43 +03:00
Florent Kermarrec
00fc2c5166
targets/orangecrab: use new DM remapping capability of LiteDRAM to fix LDM/UDM.
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Required by VexRiscv-SMP that uses DMs on LiteDRAM interface.
2020-12-16 11:52:58 +01:00
Vadim Kaushan
bb58258fd4
Fix de10nano target
2020-12-14 15:27:33 +03:00
Florent Kermarrec
519f9449fa
targets/sds1104: litex_term now directly supports crossover uart.
2020-12-10 13:56:01 +01:00
Robert Winkler
18337cdf25
targets/arty: sync with litex repository
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Signed-off-by: Robert Winkler <rwinkler@antmicro.com>
2020-12-07 17:32:40 +01:00
Geert Uytterhoeven
8e5f955e4e
targets/orangecrab: Fix --sdram-device help text
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Obviously --sdram-device takes the SDRAM device, not the ECP5 FPGA
device.
Fixes: bf3c9dc9bf
("orangecrab: Add sdram selection option")
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2020-12-04 14:34:01 +01:00
Florent Kermarrec
fe563baec7
targets/fomu: modification to ValentyUSB no longer required.
...
Following commits make it generic/portable while still using IOBuffers:
77b9d01058
371526e432
2020-11-27 19:40:45 +01:00
Florent Kermarrec
5a4e28d47d
target/usb_acm: switch git clone to litex-hub/valentyusb repo (up to date with LiteX).
2020-11-27 18:53:45 +01:00
Gwenhael Goavec-Merou
8d1095224f
add support for redpitaya14/16
2020-11-26 06:54:11 +01:00
David Shah
11fa5c34ac
nexus: Allow selection of toolchain
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-25 09:45:25 +00:00
Florent Kermarrec
159a0c751c
targets/colorlight_5a_75x: update instructions and LiteEthPHYRGMII's tx_delay (required with LiteEth fixes).
2020-11-23 12:30:36 +01:00
Florent Kermarrec
03bb929f27
colorlight_5a_75x: add LedChaser.
2020-11-23 10:14:20 +01:00
Jędrzej Boczar
ce38cff41d
mercury_xu5: reduce cmd_latency to fix problems with DRAM leveling
2020-11-20 15:31:47 +01:00
enjoy-digital
a2f3add24e
Merge pull request #123 from teknoman117/litefury
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Support for the RHS Research LiteFury
2020-11-20 08:44:27 +01:00
Nathaniel R. Lewis
389b623fe2
targets/litefury: new target
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LiteFury is an Artix-7 development board in the M.2 form factor
for PCIe accelerator development. It's similar to the Aller but
with an xc7a100t rather than an xc7a200t and no TPM module.
https://rhsresearch.com/collections/rhs-public/products/litefury
2020-11-19 21:52:14 -08:00
Florent Kermarrec
49e1c34dfd
targets/acorn_cle_215: add SATA.
2020-11-18 19:14:18 +01:00
Florent Kermarrec
778ce53865
targets/xcu1525: add SATA.
2020-11-17 15:27:42 +01:00
Florent Kermarrec
27e19644f4
targets/kcu105: add SATA.
2020-11-16 18:44:18 +01:00
Florent Kermarrec
27f60b2e93
add initial Siglent SDS1104X-E support (Ethernet & DDR3 validated).
...
Pinout from https://github.com/360nosc0pe project.
2020-11-13 12:20:15 +01:00
Florent Kermarrec
d42af3ea19
targets: add --sys-clk-freq support to all targets.
2020-11-12 18:07:28 +01:00