Commit graph

32 commits

Author SHA1 Message Date
Gwenhael Goavec-Merou
a4fc45bba6 targets/efinix_titanium_ti60_f225_dev_kit: adding jtagbone support (litex_server --jtag --jtag-config openocd_titanium_ft4232.cfg) 2023-10-18 09:11:54 +02:00
Florent Kermarrec
c960e85d11 targets/efinix: Now rely in LiteX to automatically exclude Tristate IOs. 2023-08-30 09:59:23 +02:00
Florent Kermarrec
4bb064853d targets/efinix: Update RGMII PHYs (IOs are now directly excluded in PHYs). 2023-08-30 08:56:20 +02:00
Florent Kermarrec
c1088befe5 targets/CRG: Add rst signal when missing.
Allow properly reseting the PLL from the SoC.
2023-07-26 16:56:27 +02:00
Florent Kermarrec
f400179b5b targets: Import all from litex.gen on all targets. 2023-02-23 09:09:33 +01:00
Florent Kermarrec
9e7079c4c8 targets: Remove int() on BaseSoC's sys_clk_freq. 2022-11-08 11:54:17 +01:00
Florent Kermarrec
b0e6414519 targets: Cleanup arguments and switch --sys-clk-freq to float (avoid conversion in code). 2022-11-08 10:41:35 +01:00
Florent Kermarrec
16b9677acd targets: Switch to soc_core_argdict.
The next move was to remove soc_core and only keep soc; so this is probably the right time to do
it in targets to avoid having to handle it later.
2022-11-07 08:43:26 +01:00
Florent Kermarrec
33b0400aed targets: Update LiteXArgumentParser imports. 2022-11-06 21:39:52 +01:00
Gwenhael Goavec-Merou
9960f38d95 targets: replace LiteXSoCArgumentParser by LiteXArgumentParser, remove tasks done LiteXArgumentParser 2022-11-06 11:27:47 +01:00
Florent Kermarrec
548a028730 targets: Switch to LiteXModule to simplify/cleanup code. 2022-10-27 21:21:37 +02:00
Florent Kermarrec
4b678da142 ti60_f225_dev_kit: Add debug on ethernet. 2022-07-08 12:17:41 +02:00
Florent Kermarrec
6b02ea024a ti60_f225_dev_kit: Fix ethernet build and enable debug. Now needs testing. 2022-06-28 19:54:00 +02:00
Florent Kermarrec
1a71932599 ti60_f225_dev_kit: Switch to Titanium RGMII PHY. 2022-06-27 19:47:22 +02:00
Florent Kermarrec
e02bee4265 efinix_ti60_f225: Prepare 1Gbps Ethernet support through RGMII extension board. 2022-06-13 16:02:26 +02:00
Florent Kermarrec
45494f60e0 targets: Change SoC/Software headers generation behaviour (Now only generated with --build).
Re-generating the SoC/Software headers was causing some un-expected behaviours for users not familiar
with the flow. For example doing a --load with a different configuration, was re-generating the Software
headers and messing up things when trying to run software on the SoC.
2022-05-06 15:14:32 +02:00
Florent Kermarrec
28da4f83eb targets: Use new HyperRAM's sys_clk_freq parameter. 2022-05-02 16:43:52 +02:00
Florent Kermarrec
a611f035d6 targets: Move CRG before SoCCore init (More logical and simplify some specific reset schemes) and switch SoCCore to one line when possible.
Moving CRG simplify reset with NaxRiscv debug module and is in fact more logical.
Also do some minor updates/cosmetic changes while touching CRG/SoCCore.
2022-04-21 12:19:45 +02:00
Florent Kermarrec
9d452b0d74 targets: Create target_group for target arguments. 2022-03-21 18:37:40 +01:00
Florent Kermarrec
cc8da9d341 targets: Simplify imports and switch to LiteXSocArgumentParser.
CPU parameters are now selectively exposed to the user:
./digilent_arty.py --cpu-type=vexriscv_smp --help will show VexRiscv-SMP parameters.
./digilent_arty.py --cpu-type=naxriscv --help will show NaxRiscv parameters.
2022-03-21 16:59:40 +01:00
Florent Kermarrec
773444a7dd targets: Switch to get_bios_filename/get_bitstream_filename. 2022-03-17 09:21:05 +01:00
Florent Kermarrec
a19c03fa55 targets: Switch to generic/portable HyperRAM core from LiteX. 2022-03-01 09:10:19 +01:00
Florent Kermarrec
7d84e6e863 efinix_titanium_ti60_t225: Add SPI/Native SDCard support.
Both modes working with 8559b88ad8.
2022-02-21 10:35:06 +01:00
Florent Kermarrec
fccb952c4b target: Remove ident_version=True no longer required. 2022-01-18 17:13:02 +01:00
Florent Kermarrec
53dc00eab7 targets/parser: Rely on argparse.ArgumentDefaultsHelpFormatter to provide default in help description.
Also do minor adjustments while doing this.
2022-01-05 17:06:40 +01:00
Florent Kermarrec
c836b57145 titanium_ti60_f225_dev_kit: Add HyperRAM separator. 2022-01-04 15:18:26 +01:00
Florent Kermarrec
28a6fad705 targets/efinix_titanium_ti60_f225: Defaults to 200MHz clock and increase HyperRam size to 32MB. 2022-01-04 11:25:18 +01:00
Franck Jullien
f18c1a033c Efinix: ti60: add HyperRAM support 2021-12-17 10:23:10 +01:00
enjoy-digital
c2a840f777
Merge pull request #307 from fjullien/titanium_spi
Titanium spi
2021-12-14 08:21:15 +01:00
Franck Jullien
9608cae2ee efinix: Ti60f225 change spi_flash module 2021-12-13 23:01:48 +01:00
Franck Jullien
be7dbf3b1b exfinix: efinix_titanium_ti60_f225_dev_kit: fix typo 2021-12-13 22:53:50 +01:00
Florent Kermarrec
179e9090d1 Rename efinix_titanium_ti60_bga225_dev_kit to efinix_titanium_ti60_f225_dev_kit and also exclude it from tested platforms/targets. 2021-12-13 15:54:56 +01:00
Renamed from litex_boards/targets/efinix_titanium_ti60_bga225_dev_kit.py (Browse further)