e980798437
gsd_orangecrab: Add --without_dfu_rst argument to allow disabling reset to DFU on Button press.
...
This is useful in some case where were button input is force through hardware change to force DFU to be in reset at startup.
2024-03-11 17:23:42 +01:00
efc15a91a9
global: Use new WaitTimer integrated cast to int.
2023-08-01 14:56:35 +02:00
18a3909a9c
global: Switch to litex.gen.genlib.misc.
2023-07-06 22:11:45 +02:00
f400179b5b
targets: Import all from litex.gen on all targets.
2023-02-23 09:09:33 +01:00
58489ebebf
targets/BaseSoC: Cleanup parameters.
2022-11-08 12:31:49 +01:00
9e7079c4c8
targets: Remove int() on BaseSoC's sys_clk_freq.
2022-11-08 11:54:17 +01:00
b0e6414519
targets: Cleanup arguments and switch --sys-clk-freq to float (avoid conversion in code).
2022-11-08 10:41:35 +01:00
16b9677acd
targets: Switch to soc_core_argdict.
...
The next move was to remove soc_core and only keep soc; so this is probably the right time to do
it in targets to avoid having to handle it later.
2022-11-07 08:43:26 +01:00
33b0400aed
targets: Update LiteXArgumentParser imports.
2022-11-06 21:39:52 +01:00
9960f38d95
targets: replace LiteXSoCArgumentParser by LiteXArgumentParser, remove tasks done LiteXArgumentParser
2022-11-06 11:27:47 +01:00
548a028730
targets: Switch to LiteXModule to simplify/cleanup code.
2022-10-27 21:21:37 +02:00
45494f60e0
targets: Change SoC/Software headers generation behaviour (Now only generated with --build).
...
Re-generating the SoC/Software headers was causing some un-expected behaviours for users not familiar
with the flow. For example doing a --load with a different configuration, was re-generating the Software
headers and messing up things when trying to run software on the SoC.
2022-05-06 15:14:32 +02:00
877bc4b45e
targets: Use full imports (vendor_board).
2022-05-02 12:55:11 +02:00
353aba0359
targets: Move USB-ACM/ValentyUSB clone directly to LiteX to avoid duplication in targets.
2022-04-21 15:43:50 +02:00
88f2625c3d
targets: Fix typos.
2022-04-21 12:29:54 +02:00
a611f035d6
targets: Move CRG before SoCCore init (More logical and simplify some specific reset schemes) and switch SoCCore to one line when possible.
...
Moving CRG simplify reset with NaxRiscv debug module and is in fact more logical.
Also do some minor updates/cosmetic changes while touching CRG/SoCCore.
2022-04-21 12:19:45 +02:00
00ff61baa9
targets: Simplify clock domains and remove useless reset_less.
...
rst was not directly assigned/used on reset_less clock domains, so reset_less
property was not really useful. With the changes on stream.CDC, having a rst
(Even fixed at 0) is now mandatory on clock domains involved in the CDC, so this
also fixes targets.
2022-04-01 11:30:38 +02:00
2a206def0f
targets/ecp5/ddr3: Uniformize cd_sys2x (reset_less).
2022-03-22 17:32:35 +01:00
9d452b0d74
targets: Create target_group for target arguments.
2022-03-21 18:37:40 +01:00
cc8da9d341
targets: Simplify imports and switch to LiteXSocArgumentParser.
...
CPU parameters are now selectively exposed to the user:
./digilent_arty.py --cpu-type=vexriscv_smp --help will show VexRiscv-SMP parameters.
./digilent_arty.py --cpu-type=naxriscv --help will show NaxRiscv parameters.
2022-03-21 16:59:40 +01:00
eb8657f515
gsd_orangecrab: Revert dm_remapping (Useful when built with VexRiscv-SMP and native LiteDRAM interface).
2022-03-18 12:56:13 +01:00
773444a7dd
targets: Switch to get_bios_filename/get_bitstream_filename.
2022-03-17 09:21:05 +01:00
617fa26acd
Add 85F to help for orangecrab device
...
The 85F orangecrab board exists, and works fine when this option is set to 85F, but leaving it out of the help is a bit confusing.
2022-02-06 10:36:58 +00:00
fccb952c4b
target: Remove ident_version=True no longer required.
2022-01-18 17:13:02 +01:00
53dc00eab7
targets/parser: Rely on argparse.ArgumentDefaultsHelpFormatter to provide default in help description.
...
Also do minor adjustments while doing this.
2022-01-05 17:06:40 +01:00
1920db3535
Add with_led_chaser argument to constructor of boards using LedChaser submodule.
2021-07-06 16:39:37 -05:00
1ca8ef97a1
targets/add_sdram: Specific size only when useful (ie for targets with > 1GB of RAM).
2021-03-29 16:03:19 +02:00
ba01776432
targets/add_sdram: Simplify call by removing useless arguments.
...
- main_ram mem_map is now directly used by add_sdram when origin is None.
- max_sdram_size/min_l2_data_width are no longer exposed as targets arguments this can
still be used enforced directly in the few cases it is useful.
2021-03-29 15:28:31 +02:00
062b899e29
platforms/targets: Add mode Vendor prefixes.
2021-03-25 16:19:11 +01:00
Florent Kermarrec
Gwenhael Goavec-Merou
Ben Stobbs
Joey Bushagour