a6e867c691
Merge pull request #144 from gsomlo/gls-genesys2-sdcard
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genesys2: LiteSDCard support
2021-01-07 08:12:24 +01:00
4eb0026a69
genesys2: add "rst" and "cd" signals to (spi-)sdcard records
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Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
2021-01-04 13:10:13 -05:00
4a95b94dbf
platforms/ecp5: Fix slewrate configuration
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When building linux-on-litex-vexriscv for OrangeCrab:
Warning: IOBUF 'spisdcard_clk' attribute 'SLEW' is not recognised (on line 207)
Warning: IOBUF 'spisdcard_mosi' attribute 'SLEW' is not recognised (on line 210)
Warning: IOBUF 'spisdcard_cs_n' attribute 'SLEW' is not recognised (on line 214)
Warning: IOBUF 'spisdcard_miso' attribute 'SLEW' is not recognised (on line 218)
Platforms using litex.build.lattice.LatticePlatform seem to support only
"SLEWRATE", not "SLEW". Fix the few offenders in the LogicBone and
OrangeCrab platform definitions.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2021-01-04 17:08:51 +01:00
93779ecb95
platforms/colorlight_5a_75b: revert toolchain args.
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Useful to do tests with Diamiond.
2020-12-29 14:22:42 +01:00
f2985f1e71
Merge pull request #141 from la6m/Colorlight_v8.0
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add colorlight v8.0 PCB
2020-12-29 14:20:29 +01:00
b67b18caad
qmtech_wukong: review/cleanup platform.
2020-12-29 14:10:49 +01:00
3e6b934961
add colorlight v8.0 PCB
2020-12-29 13:52:13 +01:00
4b721eded7
add QmTech Wukong board support.
2020-12-29 13:20:42 +01:00
9beaf25822
nexys4ddr: fix eth/int_n pin (B8) and use 4-bit on vga.blue.
2020-12-24 10:15:29 +01:00
2a04c5c74e
nexys4ddr: add support for litexvideo VGA Terminal
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This commit adds VGA support for the Nexys A7/ Nexys 4 DDR.
The VGA is however limited to RGB443 instead of the full 12bit RGB444.
This is because IO D8 which is MSB for Blue, is also used for ETH int_n.
This makes the final output have a yellow tint.
2020-12-23 02:24:18 +05:30
ec4ccc9fa5
platforms/xcu1525: fix ddram 1/2/3 pinout.
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DDR4 now validated successfully with LiteDRAM on the 4 channels.
2020-12-11 13:58:26 +01:00
18337cdf25
targets/arty: sync with litex repository
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Signed-off-by: Robert Winkler <rwinkler@antmicro.com>
2020-12-07 17:32:40 +01:00
f66860c201
zybo_z7: fix clock pin constraint
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2020-12-07 16:46:20 +01:00
8d1095224f
add support for redpitaya14/16
2020-11-26 06:54:11 +01:00
11fa5c34ac
nexus: Allow selection of toolchain
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Signed-off-by: David Shah <dave@ds0.me>
2020-11-25 09:45:25 +00:00
389b623fe2
targets/litefury: new target
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LiteFury is an Artix-7 development board in the M.2 form factor
for PCIe accelerator development. It's similar to the Aller but
with an xc7a100t rather than an xc7a200t and no TPM module.
https://rhsresearch.com/collections/rhs-public/products/litefury
2020-11-19 21:52:14 -08:00
27f60b2e93
add initial Siglent SDS1104X-E support (Ethernet & DDR3 validated).
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Pinout from https://github.com/360nosc0pe project.
2020-11-13 12:20:15 +01:00
843e724e3d
targets/pcie: simplify using new LiteX's add_pcie method and enable it on all devices supported by LitePCIe.
2020-11-12 16:39:42 +01:00
9f11bfb0d1
qmtech_ep4ce15: convert name to lowercase, minor cleanup and add to test_targets.
2020-11-12 14:33:45 +01:00
31eb74dc2d
Merge pull request #122 from baselsayeh/master
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add Qmtech EP4CE15 coreboard support
2020-11-12 14:27:49 +01:00
46e8a957fe
platforms/zybo_z7: fix default_clk typo.
2020-11-12 14:26:36 +01:00
ac075f18c7
platforms/crosslink_nx_evn/vip: add default_clk.
2020-11-12 14:26:17 +01:00
0fc67ddfdb
update copyright
2020-11-12 15:25:39 +02:00
a4d05522d4
platforms/ice40/ecp5: add toolchain parameter with default to trellis (ECP5) or icestorm (iCE40).
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Required to simplify simple.py target and use trellis/icestorm as default toolchain.
2020-11-12 13:33:30 +01:00
1b1ed5ebf1
add Qmtech EP4CE15 coreboard support
2020-11-12 01:56:36 +02:00
97b64d16a6
Lattice NX PLL Support
2020-11-08 20:34:46 -06:00
1f52fbaca6
xcu1525: fix last ddram channel numbering.
2020-11-06 10:48:26 +01:00
2da4eabffe
platforms/icebreaker: fix refactoring typo.
2020-11-04 09:30:01 +01:00
c093d0d0fc
platforms: cleanup pass to uniformize comments/separators/orders.
2020-11-03 10:48:57 +01:00
d1c9cc7553
Add LFE5U-12F device for ULX3S
2020-11-01 23:45:32 +00:00
d626861e95
platforms/acorn_cle_215: add serial_io (on P2).
2020-10-29 12:10:12 +01:00
51934567fe
Merge pull request #118 from daveshah1/lifcl-vip
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Add CrossLink-NX VIP board platform and target
2020-10-22 11:03:47 +02:00
a38c1e7062
mist: add copyrights.
2020-10-22 10:48:58 +02:00
20720693c4
crosslink_nx_vip: Add HyperRAM support
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Signed-off-by: David Shah <dave@ds0.me>
2020-10-22 09:15:40 +01:00
b278d8bccc
Add CrossLink-NX VIP board platform and target
2020-10-22 09:15:35 +01:00
4541c39e94
Initial support for the MIST board ( https://github.com/mist-devel/mist-board/wiki )
2020-10-17 12:28:22 +02:00
982cfd5ad5
platforms/xcu1525: fix ddram constraints, add clk300 constraints for all channels.
2020-10-13 11:50:36 +02:00
ddf7038c78
ulx3s: add 1.7 and 2.0 revisions support.
2020-10-12 13:23:26 +02:00
3b11e60fb1
Update ULX3S SD pins for revision 2.0
2020-10-11 14:17:48 +11:00
55da8b867a
platforms/zedboard: minor cleanups to uniformize with other platforms.
2020-10-07 11:25:20 +02:00
e225cbd28f
add zedboard platform to CI
2020-10-06 11:35:03 -07:00
8ee20a3f30
clean up imports
2020-10-06 11:24:34 -07:00
865c2bd98c
zedboard platform: clean up
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* remove unused code
* remove oled integration code
* openocd = default programmer
2020-10-06 11:00:36 -07:00
12aed44577
add zedboard platform
2020-10-06 00:28:54 -07:00
79ef091a06
Merge pull request #110 from pepijndevos/gowin
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Add initial support for Trenz TEC0117 board
2020-10-05 19:50:09 +02:00
2ee32f2a15
Merge pull request #109 from geertu/orangecrab-Fix-r0.1-user_led-mapping
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orangecrab: Fix r0.1 user_led mapping
2020-10-02 09:40:41 +02:00
062fbd6c63
Merge pull request #108 from daveshah1/dave/nx-evn-doc
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crosslink_nx_evn: Improve documentation on UART jumpers
2020-10-02 09:40:04 +02:00
81e4f1f158
add initial support for Trenz TEC0117 board
2020-09-30 14:01:36 +02:00
b2e34f5faf
orangecrab: Fix r0.1 user_led mapping
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On r0.1, all three user_leds are mapped to the same pin.
Fix this by mapping them to the pins connected to the individual
channels of the RGB LED, to match the comments, the schematics, and the
spirit of r0.2.
Untested on real hardware (I have r0.2 only).
Fixes: c94cbae0c0
2020-09-25 10:33:21 +02:00
c6610b4a3f
platforms/xcu1525: update ddram1/2/3 pinout.
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Using https://github.com/d953i/Custom_Part_Data_Files/blob/master/Boards/Xilinx_BCU1525/BCU1525_DIMMx.xdc
2020-09-20 21:07:00 +02:00
enjoy-digital
Gabriel Somlo
Geert Uytterhoeven
la6m
Shinken Sanada
Sahaj Sarup
Robert Winkler
Alessandro Comodi
Gwenhael Goavec-Merou
David Shah
Nathaniel R. Lewis
Basel Sayeh
davidcorrigan714
Kevin Mehall
YanekJ
Bryan Jacobs
Michael Betz
Pepijn de Vos