Commit Graph

954 Commits

Author SHA1 Message Date
Gwenhael Goavec-Merou 7f26f3940f efinix_trion_t120_bga576_dev_kit.py: fixed/rewire rx_ctl/tx_ctl (not compatible with DDIO mode), added message at build time 2024-09-03 16:01:51 +02:00
Gwenhael Goavec-Merou 5bfde29ce4 platforms/lattice_certuspro_nx_evn.py: fix led pinout 2024-08-28 17:02:05 +02:00
enjoy-digital 4002b8167c
Merge pull request #602 from trabucayre/fix_tangPrimer20k_iostandard
platforms/sipeed_tang_primer_20k.py: fix IOStandard values
2024-08-19 17:14:25 +02:00
enjoy-digital 52fc033bf5
Merge pull request #599 from trabucayre/sipeed_tang_gw5A_SDRAM
Sipeed tang gw5 a sdram
2024-08-19 17:12:48 +02:00
Gwenhael Goavec-Merou a5ee3c807a platforms/sipeed_tang_primer_20k.py: fix IOStandard values 2024-08-14 09:16:39 +02:00
Gwenhael Goavec-Merou b1a6da84b3 sipeed_tang_primer_25k: add SDRAM support (j3 connector), allows user to select between mister and sipeed SDRAM module 2024-08-04 12:14:56 +02:00
Gwenhael Goavec-Merou 2fa838b79d sipeed_tang_mega_138k_pro: added SDRAM sipeed variant, allows user to select between mister and sipeed SDRAM module, fix sipeed SDRAM memory module 2024-08-04 12:13:47 +02:00
Malte 241dfb6780 fix pinnumber on connector C 2024-08-01 19:14:49 +02:00
Florent Kermarrec 81209b9fd1 platforms/enclustra_mercury_xu8_pe3: Revert to VivadoProgrammer since OpenFPGALoader is not albe to load bitstream correctly if FPGA is not already configured. 2024-07-22 15:28:25 +02:00
Gwenhael Goavec-Merou ab732011b3 plaforms/lattice_certuspro_nx_xx: SPI_MASTER_PORT disabled (required to have access to the flash), added default clk period constraints 2024-07-22 14:49:03 +02:00
Florent Kermarrec 0394b626fa platforms/enclustrat_mercury_xu8_pe3: Switch to OpenFPGALoader for loading FPGA. 2024-07-22 11:39:17 +02:00
Florent Kermarrec 6d3c87a6f7 platforms/lattice_certuspro_nx_versa: Fix default_clk. 2024-07-17 15:14:53 +02:00
Florent Kermarrec fff2e6bd3f platform: Add Lattice CertusPro-NX Versa initial support. 2024-07-17 14:53:12 +02:00
Florent Kermarrec 524387b45d sqrl_xcu1525: Fix typo. 2024-07-11 12:54:38 +02:00
Florent Kermarrec e94e84eb16 sqrl_xcu1525: Add more QSFP IOs. 2024-07-10 18:20:01 +02:00
Florent Kermarrec c7b436a202 sqrl_xcu1525: Add QSFP-0/1 ref clks and rearrange a bit naming. 2024-07-10 17:04:48 +02:00
Florent Kermarrec 00df115e86 sqrl_xcu1525: Add QSFP-0/1 IOs. 2024-07-10 16:44:12 +02:00
Yichuan Gao 5870b078f8
platforms/xilinx_vcu118: add fmc and pmod connector pinouts
VCU118 board has one FMC HPC, one FMC+ HSPC and two PMOD connectors,
Vivado board files does not contain pinouts for these, so pinouts are
taken from VCU118 Evaluation Board User Guide (UG1224).

Signed-off-by: Yichuan Gao <gaoyichuan000@gmail.com>
2024-07-06 00:16:53 +08:00
Florent Kermarrec 15c6f89b1a #570: Update CAN support with LiteX https://github.com/enjoy-digital/litex/pull/2007. 2024-07-05 10:26:28 +02:00
enjoy-digital 2e120bf8a4
Merge pull request #570 from disdi/master
Add support for CTUCAN for Arty & Genesys2 board
2024-07-05 09:21:09 +02:00
Florent Kermarrec 7a157d787b lattice_certus_prox_nx: Add missing OpenFPGAALoader import. 2024-07-01 15:58:31 +02:00
Gwenhael Goavec-Merou 1c06988d80 platforms,targets/lattice_certuspro_nx_evn,lattice_certuspro_nx_vvml: set sysconfig SPI_MASTER mode by default at platform level 2024-07-01 11:07:25 +02:00
Gwenhael Goavec-Merou 8579af5710 lattice_certuspro_nx_vvml: new board support 2024-06-28 12:47:57 +02:00
Gwenhael Goavec-Merou f27bbc9645 lattice_certuspro_nx_evn: new board support 2024-06-28 12:47:16 +02:00
Florent Kermarrec bd58227c86 platforms/sqrl_acorn/_litex_acorn_baseboard_mini_io: Add SFP-I2C and Debug IOs. 2024-06-27 14:55:15 +02:00
Florent Kermarrec 91e787b5c3 platforms/sqrl_acorn: Add _litex_acorn_baseboard_mini_io for LiteX Acorn Baseboard Mini specific IOs. 2024-06-27 14:23:17 +02:00
Gwenhael Goavec-Merou 75ef26b8e5 platforms/machdyne_mozart_mx1.py: adding default_clk_name, default_clk_period (fix CI failure) 2024-06-22 22:43:06 +02:00
inc a1df389c7e machdyne: switch to LiteXArgumentParser; add mozart ml2+mx1 and vivaldi ml1 2024-06-22 11:26:43 +02:00
inc 34e85c5cf6 machdyne: fix typos; add vanille and lakritz 2024-06-22 09:26:42 +02:00
Florent Kermarrec dad6b2b9b6 efinix_trion_t20_bga256_dev_kit: Cleanup/Review platform/target. 2024-06-19 08:23:54 +02:00
enjoy-digital 8eaa4d637e
Merge pull request #589 from VOGL-electronic/sdram_efinix_trion_t20
efinix_trion_t20: add sdram
2024-06-19 08:18:19 +02:00
Florent Kermarrec 805a520b5a litex_acorn_baseboard_mini: Fix and test PCIe Gen2 X1 with it. 2024-06-18 09:14:08 +02:00
Gwenhael Goavec-Merou 6e6246d718 platforms/lambdaconcept_ecpix5.py: create_programmer: added option to select between r03 version (FT4232) and provious (FT2232) 2024-06-14 15:46:36 +02:00
Florent Kermarrec 1b22061e93 litex_acorn_baseboard_mini: Add PCIe support (Not yet buildable with Ethernet or SATA due to GTPE2_COMMON sharing). 2024-06-13 17:46:16 +02:00
Florent Kermarrec eebe983914 platforms/sqrl_acorn: Add PCIe X1 pins when mounted in baseboard. 2024-06-13 17:23:26 +02:00
Fin Maaß 2cd89cdd16 efinix_trion_t20: add sdram
add sdram of the efinix trion t20 bga256 dev kit.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2024-06-13 12:16:09 +02:00
Akio 3c181106b8 Add HSEDA XC7A35T board support
Add HSEDA XC7A35T board support
2024-05-21 21:00:27 +08:00
Gwenhael Goavec-Merou b8d2b513a3 platforms/xilinx_zcu102.py: added PMOD0/1 (j55/j87) 2024-05-21 11:24:22 +02:00
Gwenhael Goavec-Merou 11956b1709 platforms/xilinx_zcu106.py: added connectors and FMC HPC0/1 2024-05-17 12:16:33 +02:00
enjoy-digital c660a7a1af
Merge pull request #585 from hansfbaier/qmtech-fgg676-fix
qmtech_artix7_fgg676.py: This board also has a 200T variant
2024-05-16 11:09:19 +02:00
enjoy-digital f544fec11b
Merge pull request #584 from hansfbaier/alientex_davincipro
alientek_davincipro: fix part number
2024-05-16 11:08:14 +02:00
Gwenhael Goavec-Merou 0b1728ce2a platform/xilinx_zcu102: fixed FMC HP0 pinout 2024-05-14 12:12:35 +02:00
Hans Baier 7166ef5bba qmtech_artix7_fgg676.py: This board also has a 200T variant, and all variants are speedgrade 2 2024-05-14 08:41:05 +07:00
Florent Kermarrec 19bce6630d Add initial LimeSDR XTRX Platform support (Adapted from Fairwaves XTRX). 2024-04-26 16:00:40 +02:00
Florent Kermarrec 7a0ee7f5cf platforms/fairwaves_xtrx: Change rst to rst_n (active low). 2024-04-26 15:50:28 +02:00
Florent Kermarrec 5a25a4e2b4 alinx_axau15p: Switch to OpenFPGALoader.
Requires: https://github.com/trabucayre/openFPGALoader/pull/452
2024-04-25 17:23:39 +02:00
Hans Baier f0c0005126 alientek_davincipro: fix part number 2024-04-25 07:42:19 +07:00
Hans Baier e0e2bf8f97 add Alientek DaVinci Pro FPGA board 2024-04-22 14:44:53 +07:00
Sylvain Munaut 24db5783c1 adi_adrv2crr: Fix typo in PMOD pinout
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2024-04-10 14:06:47 +02:00
Gwenhael Goavec-Merou 62b5b58aec platforms,targets/xilinx_zc706: added choice between vivado(default) and openFPGALoader, re-enable DDR 2024-04-08 20:38:09 +02:00