litex/software/bios/sdram.c

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#include <generated/csr.h>
#ifdef DFII_BASE
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#include <stdio.h>
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#include <stdlib.h>
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#include <generated/sdram_phy.h>
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#include <generated/mem.h>
#include <hw/flags.h>
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#include "sdram.h"
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static void cdelay(int i)
{
while(i > 0) {
__asm__ volatile("nop");
i--;
}
}
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void ddrsw(void)
{
dfii_control_write(DFII_CONTROL_CKE);
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printf("DDR now under software control\n");
}
void ddrhw(void)
{
dfii_control_write(DFII_CONTROL_SEL|DFII_CONTROL_CKE);
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printf("DDR now under hardware control\n");
}
void ddrrow(char *_row)
{
char *c;
unsigned int row;
if(*_row == 0) {
dfii_pi0_address_write(0x0000);
dfii_pi0_baddress_write(0);
command_p0(DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS);
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cdelay(15);
printf("Precharged\n");
} else {
row = strtoul(_row, &c, 0);
if(*c != 0) {
printf("incorrect row\n");
return;
}
dfii_pi0_address_write(row);
dfii_pi0_baddress_write(0);
command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CS);
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cdelay(15);
printf("Activated row %d\n", row);
}
}
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void ddrrd(char *startaddr)
{
char *c;
unsigned int addr;
int i;
if(*startaddr == 0) {
printf("ddrrd <address>\n");
return;
}
addr = strtoul(startaddr, &c, 0);
if(*c != 0) {
printf("incorrect address\n");
return;
}
dfii_pird_address_write(addr);
dfii_pird_baddress_write(0);
command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
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cdelay(15);
for(i=0;i<8;i++)
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printf("%02x", MMPTR(0xe0001038+4*i));
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for(i=0;i<8;i++)
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printf("%02x", MMPTR(0xe000108c+4*i));
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printf("\n");
}
void ddrwr(char *startaddr)
{
char *c;
unsigned int addr;
int i;
if(*startaddr == 0) {
printf("ddrrd <address>\n");
return;
}
addr = strtoul(startaddr, &c, 0);
if(*c != 0) {
printf("incorrect address\n");
return;
}
for(i=0;i<8;i++) {
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MMPTR(0xe0001018+4*i) = i;
MMPTR(0xe000106c+4*i) = 0xf0 + i;
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}
dfii_piwr_address_write(addr);
dfii_piwr_baddress_write(0);
command_pwr(DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS|DFII_COMMAND_WRDATA);
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}
#define TEST_SIZE (4*1024*1024)
int memtest_silent(void)
{
volatile unsigned int *array = (unsigned int *)SDRAM_BASE;
int i;
unsigned int prv;
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unsigned int error_cnt;
prv = 0;
for(i=0;i<TEST_SIZE/4;i++) {
prv = 1664525*prv + 1013904223;
array[i] = prv;
}
prv = 0;
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error_cnt = 0;
for(i=0;i<TEST_SIZE/4;i++) {
prv = 1664525*prv + 1013904223;
if(array[i] != prv)
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error_cnt++;
}
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return error_cnt;
}
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int memtest(void)
{
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unsigned int e;
e = memtest_silent();
if(e != 0) {
printf("Memtest failed: %d/%d words incorrect\n", e, TEST_SIZE/4);
return 0;
} else {
printf("Memtest OK\n");
return 1;
}
}
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int ddrinit(void)
{
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printf("Initializing DDR SDRAM...\n");
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init_sequence();
dfii_control_write(DFII_CONTROL_SEL|DFII_CONTROL_CKE);
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if(!memtest())
return 0;
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return 1;
}
#endif